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author | Owen Anderson <resistor@mac.com> | 2008-07-02 23:41:07 +0000 |
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committer | Owen Anderson <resistor@mac.com> | 2008-07-02 23:41:07 +0000 |
commit | f660c171c838793b87b7e58e91609cecf256378d (patch) | |
tree | 00033566da5e0a30f9e67bd56e9a124ccceabfb7 /lib/Target/ARM/ARMInstrInfo.cpp | |
parent | cd920d9ecfcefff13c3619a32b58399cac2e3630 (diff) | |
download | llvm-f660c171c838793b87b7e58e91609cecf256378d.tar.gz llvm-f660c171c838793b87b7e58e91609cecf256378d.tar.bz2 llvm-f660c171c838793b87b7e58e91609cecf256378d.tar.xz |
Make LiveVariables even more optional, by making it optional in the call to TargetInstrInfo::convertToThreeAddressInstruction
Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@53058 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.cpp')
-rw-r--r-- | lib/Target/ARM/ARMInstrInfo.cpp | 37 |
1 files changed, 20 insertions, 17 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.cpp b/lib/Target/ARM/ARMInstrInfo.cpp index f9f10bafe3..61e4f26a16 100644 --- a/lib/Target/ARM/ARMInstrInfo.cpp +++ b/lib/Target/ARM/ARMInstrInfo.cpp @@ -191,7 +191,7 @@ static unsigned getUnindexedOpcode(unsigned Opc) { MachineInstr * ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, MachineBasicBlock::iterator &MBBI, - LiveVariables &LV) const { + LiveVariables *LV) const { if (!EnableARM3Addr) return NULL; @@ -300,22 +300,25 @@ ARMInstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI, if (MO.isRegister() && MO.getReg() && TargetRegisterInfo::isVirtualRegister(MO.getReg())) { unsigned Reg = MO.getReg(); - LiveVariables::VarInfo &VI = LV.getVarInfo(Reg); - if (MO.isDef()) { - MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI; - if (MO.isDead()) - LV.addVirtualRegisterDead(Reg, NewMI); - } - if (MO.isUse() && MO.isKill()) { - for (unsigned j = 0; j < 2; ++j) { - // Look at the two new MI's in reverse order. - MachineInstr *NewMI = NewMIs[j]; - if (!NewMI->readsRegister(Reg)) - continue; - LV.addVirtualRegisterKilled(Reg, NewMI); - if (VI.removeKill(MI)) - VI.Kills.push_back(NewMI); - break; + + if (LV) { + LiveVariables::VarInfo &VI = LV->getVarInfo(Reg); + if (MO.isDef()) { + MachineInstr *NewMI = (Reg == WBReg) ? UpdateMI : MemMI; + if (MO.isDead()) + LV->addVirtualRegisterDead(Reg, NewMI); + } + if (MO.isUse() && MO.isKill()) { + for (unsigned j = 0; j < 2; ++j) { + // Look at the two new MI's in reverse order. + MachineInstr *NewMI = NewMIs[j]; + if (!NewMI->readsRegister(Reg)) + continue; + LV->addVirtualRegisterKilled(Reg, NewMI); + if (VI.removeKill(MI)) + VI.Kills.push_back(NewMI); + break; + } } } } |