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| author | Tim Northover <tnorthover@apple.com> | 2014-01-14 13:05:47 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-01-14 13:05:47 +0000 |
| commit | 6849f102ca2a3d2dcb252dd4f997db6f92443688 (patch) | |
| tree | befc826738d380ed6d7b2cb3f91e89fad3ad5ff7 /lib/Target/ARM/ARMInstrInfo.td | |
| parent | 6e533d710dc987dcf9647aa10246c7a522d6e43e (diff) | |
| download | llvm-6849f102ca2a3d2dcb252dd4f997db6f92443688.tar.gz llvm-6849f102ca2a3d2dcb252dd4f997db6f92443688.tar.bz2 llvm-6849f102ca2a3d2dcb252dd4f997db6f92443688.tar.xz | |
ARM: add constraint that RdLo != Rn != RdHi for v5 MLA insts.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199212 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/ARM/ARMInstrInfo.td')
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 334d75fd53..05c3859b4b 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -3714,7 +3714,8 @@ def UMAAL : AMul1I <0b0000010, (outs GPR:$RdLo, GPR:$RdHi), let Inst{3-0} = Rn; } -let Constraints = "$RLo = $RdLo,$RHi = $RdHi" in { +let Constraints = + "@earlyclobber $RdLo,@earlyclobber $RdHi,$RLo = $RdLo,$RHi = $RdHi" in { def SMLALv5 : ARMPseudoExpand<(outs GPR:$RdLo, GPR:$RdHi), (ins GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi, pred:$p, cc_out:$s), 4, IIC_iMAC64, [], |