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authorCraig Topper <craig.topper@gmail.com>2013-01-07 06:14:20 +0000
committerCraig Topper <craig.topper@gmail.com>2013-01-07 06:14:20 +0000
commita812641879b89d636bd2e72b0cba8c13d84be709 (patch)
treeec506058e890b55b1548555181192b4b8dc52c76 /lib/Target/Hexagon/HexagonInstrInfoV4.td
parent92f09170aa175e6764218e0a83f2f9cbed5a5234 (diff)
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Remove more unnecessary # operators with nothing to paste proceeding them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171702 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Hexagon/HexagonInstrInfoV4.td')
-rw-r--r--lib/Target/Hexagon/HexagonInstrInfoV4.td36
1 files changed, 18 insertions, 18 deletions
diff --git a/lib/Target/Hexagon/HexagonInstrInfoV4.td b/lib/Target/Hexagon/HexagonInstrInfoV4.td
index bfe9bb9a76..372de9a8b2 100644
--- a/lib/Target/Hexagon/HexagonInstrInfoV4.td
+++ b/lib/Target/Hexagon/HexagonInstrInfoV4.td
@@ -418,7 +418,7 @@ def LDrid_indexed_V4 : LDInst<(outs DoubleRegs:$dst),
// addressing mode
multiclass ld_idxd_shl_pbase<string mnemonic, RegisterClass RC, bit isNot,
bit isPredNew> {
- let PNewValue = #!if(isPredNew, "new", "") in
+ let PNewValue = !if(isPredNew, "new", "") in
def NAME : LDInst2<(outs RC:$dst),
(ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$offset),
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -427,7 +427,7 @@ multiclass ld_idxd_shl_pbase<string mnemonic, RegisterClass RC, bit isNot,
}
multiclass ld_idxd_shl_pred<string mnemonic, RegisterClass RC, bit PredNot> {
- let PredSense = #!if(PredNot, "false", "true") in {
+ let PredSense = !if(PredNot, "false", "true") in {
defm _c#NAME : ld_idxd_shl_pbase<mnemonic, RC, PredNot, 0>;
// Predicate new
defm _cdn#NAME : ld_idxd_shl_pbase<mnemonic, RC, PredNot, 1>;
@@ -1518,7 +1518,7 @@ def STriw_abs_set_V4 : STInst2<(outs IntRegs:$dst1),
// mode
multiclass ST_Idxd_shl_Pbase<string mnemonic, RegisterClass RC, bit isNot,
bit isPredNew> {
- let PNewValue = #!if(isPredNew, "new", "") in
+ let PNewValue = !if(isPredNew, "new", "") in
def NAME : STInst2<(outs),
(ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$src4,
RC:$src5),
@@ -1529,7 +1529,7 @@ multiclass ST_Idxd_shl_Pbase<string mnemonic, RegisterClass RC, bit isNot,
}
multiclass ST_Idxd_shl_Pred<string mnemonic, RegisterClass RC, bit PredNot> {
- let PredSense = #!if(PredNot, "false", "true") in {
+ let PredSense = !if(PredNot, "false", "true") in {
defm _c#NAME : ST_Idxd_shl_Pbase<mnemonic, RC, PredNot, 0>;
// Predicate new
defm _cdn#NAME : ST_Idxd_shl_Pbase<mnemonic, RC, PredNot, 1>;
@@ -1542,7 +1542,7 @@ multiclass ST_Idxd_shl<string mnemonic, string CextOp, RegisterClass RC> {
let isPredicable = 1 in
def NAME#_V4 : STInst2<(outs),
(ins IntRegs:$src1, IntRegs:$src2, u2Imm:$src3, RC:$src4),
- #mnemonic#"($src1+$src2<<#$src3) = $src4",
+ mnemonic#"($src1+$src2<<#$src3) = $src4",
[]>,
Requires<[HasV4T]>;
@@ -1557,7 +1557,7 @@ multiclass ST_Idxd_shl<string mnemonic, string CextOp, RegisterClass RC> {
// addressing mode.
multiclass ST_Idxd_shl_Pbase_nv<string mnemonic, RegisterClass RC, bit isNot,
bit isPredNew> {
- let PNewValue = #!if(isPredNew, "new", "") in
+ let PNewValue = !if(isPredNew, "new", "") in
def NAME#_nv_V4 : NVInst_V4<(outs),
(ins PredRegs:$src1, IntRegs:$src2, IntRegs:$src3, u2Imm:$src4,
RC:$src5),
@@ -1568,7 +1568,7 @@ multiclass ST_Idxd_shl_Pbase_nv<string mnemonic, RegisterClass RC, bit isNot,
}
multiclass ST_Idxd_shl_Pred_nv<string mnemonic, RegisterClass RC, bit PredNot> {
- let PredSense = #!if(PredNot, "false", "true") in {
+ let PredSense = !if(PredNot, "false", "true") in {
defm _c#NAME : ST_Idxd_shl_Pbase_nv<mnemonic, RC, PredNot, 0>;
// Predicate new
defm _cdn#NAME : ST_Idxd_shl_Pbase_nv<mnemonic, RC, PredNot, 1>;
@@ -1581,7 +1581,7 @@ multiclass ST_Idxd_shl_nv<string mnemonic, string CextOp, RegisterClass RC> {
let isPredicable = 1 in
def NAME#_nv_V4 : NVInst_V4<(outs),
(ins IntRegs:$src1, IntRegs:$src2, u2Imm:$src3, RC:$src4),
- #mnemonic#"($src1+$src2<<#$src3) = $src4.new",
+ mnemonic#"($src1+$src2<<#$src3) = $src4.new",
[]>,
Requires<[HasV4T]>;
@@ -1682,17 +1682,17 @@ def POST_STdri_cdnNotPt_V4 : STInst2PI<(outs IntRegs:$dst),
// addressing mode and immediate stored value.
multiclass ST_Imm_Pbase<string mnemonic, Operand OffsetOp, bit isNot,
bit isPredNew> {
- let PNewValue = #!if(isPredNew, "new", "") in
+ let PNewValue = !if(isPredNew, "new", "") in
def NAME : STInst2<(outs),
(ins PredRegs:$src1, IntRegs:$src2, OffsetOp:$src3, s6Ext:$src4),
- #!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
+ !if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
") ")#mnemonic#"($src2+#$src3) = #$src4",
[]>,
Requires<[HasV4T]>;
}
multiclass ST_Imm_Pred<string mnemonic, Operand OffsetOp, bit PredNot> {
- let PredSense = #!if(PredNot, "false", "true") in {
+ let PredSense = !if(PredNot, "false", "true") in {
defm _c#NAME : ST_Imm_Pbase<mnemonic, OffsetOp, PredNot, 0>;
// Predicate new
defm _cdn#NAME : ST_Imm_Pbase<mnemonic, OffsetOp, PredNot, 1>;
@@ -1705,7 +1705,7 @@ multiclass ST_Imm<string mnemonic, string CextOp, Operand OffsetOp> {
let opExtendable = 2, opExtentBits = 8, isPredicable = 1 in
def NAME#_V4 : STInst2<(outs),
(ins IntRegs:$src1, OffsetOp:$src2, s8Ext:$src3),
- #mnemonic#"($src1+#$src2) = #$src3",
+ mnemonic#"($src1+#$src2) = #$src3",
[]>,
Requires<[HasV4T]>;
@@ -2356,7 +2356,7 @@ def : Pat<(store (i32 IntRegs:$src1),
//
multiclass ST_Idxd_Pbase_nv<string mnemonic, RegisterClass RC,
Operand predImmOp, bit isNot, bit isPredNew> {
- let PNewValue = #!if(isPredNew, "new", "") in
+ let PNewValue = !if(isPredNew, "new", "") in
def NAME#_nv_V4 : NVInst_V4<(outs),
(ins PredRegs:$src1, IntRegs:$src2, predImmOp:$src3, RC: $src4),
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -2367,7 +2367,7 @@ multiclass ST_Idxd_Pbase_nv<string mnemonic, RegisterClass RC,
multiclass ST_Idxd_Pred_nv<string mnemonic, RegisterClass RC, Operand predImmOp,
bit PredNot> {
- let PredSense = #!if(PredNot, "false", "true") in {
+ let PredSense = !if(PredNot, "false", "true") in {
defm _c#NAME : ST_Idxd_Pbase_nv<mnemonic, RC, predImmOp, PredNot, 0>;
// Predicate new
defm _cdn#NAME : ST_Idxd_Pbase_nv<mnemonic, RC, predImmOp, PredNot, 1>;
@@ -2384,7 +2384,7 @@ multiclass ST_Idxd_nv<string mnemonic, string CextOp, RegisterClass RC,
isPredicable = 1 in
def NAME#_nv_V4 : NVInst_V4<(outs),
(ins IntRegs:$src1, ImmOp:$src2, RC:$src3),
- #mnemonic#"($src1+#$src2) = $src3.new",
+ mnemonic#"($src1+#$src2) = $src3.new",
[]>,
Requires<[HasV4T]>;
@@ -2409,7 +2409,7 @@ let addrMode = BaseImmOffset, validSubTargets = HasV4SubT in {
// and MEMri operand.
multiclass ST_MEMri_Pbase_nv<string mnemonic, RegisterClass RC, bit isNot,
bit isPredNew> {
- let PNewValue = #!if(isPredNew, "new", "") in
+ let PNewValue = !if(isPredNew, "new", "") in
def NAME#_nv_V4 : NVInst_V4<(outs),
(ins PredRegs:$src1, MEMri:$addr, RC: $src2),
!if(isNot, "if (!$src1", "if ($src1")#!if(isPredNew, ".new) ",
@@ -2419,7 +2419,7 @@ multiclass ST_MEMri_Pbase_nv<string mnemonic, RegisterClass RC, bit isNot,
}
multiclass ST_MEMri_Pred_nv<string mnemonic, RegisterClass RC, bit PredNot> {
- let PredSense = #!if(PredNot, "false", "true") in {
+ let PredSense = !if(PredNot, "false", "true") in {
defm _c#NAME : ST_MEMri_Pbase_nv<mnemonic, RC, PredNot, 0>;
// Predicate new
@@ -2436,7 +2436,7 @@ multiclass ST_MEMri_nv<string mnemonic, string CextOp, RegisterClass RC,
isPredicable = 1 in
def NAME#_nv_V4 : NVInst_V4<(outs),
(ins MEMri:$addr, RC:$src),
- #mnemonic#"($addr) = $src.new",
+ mnemonic#"($addr) = $src.new",
[]>,
Requires<[HasV4T]>;