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| author | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-01-15 13:01:18 +0000 |
|---|---|---|
| committer | Zoran Jovanovic <zoran.jovanovic@imgtec.com> | 2014-01-15 13:01:18 +0000 |
| commit | f5c2d3896b8af35409b7c1b11c3811c459b0ccd1 (patch) | |
| tree | fbd70a4cac93a454fb956a309767cecc8e019d3c /lib/Target/Mips/MicroMipsInstrInfo.td | |
| parent | 9ac0e23865889b4668e2661a0d01091ef1559d6d (diff) | |
| download | llvm-f5c2d3896b8af35409b7c1b11c3811c459b0ccd1.tar.gz llvm-f5c2d3896b8af35409b7c1b11c3811c459b0ccd1.tar.bz2 llvm-f5c2d3896b8af35409b7c1b11c3811c459b0ccd1.tar.xz | |
Added support for LWU microMIPS instruction.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199315 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/MicroMipsInstrInfo.td')
| -rw-r--r-- | lib/Target/Mips/MicroMipsInstrInfo.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/lib/Target/Mips/MicroMipsInstrInfo.td b/lib/Target/Mips/MicroMipsInstrInfo.td index 84cba5fb20..ffcf48bf98 100644 --- a/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/lib/Target/Mips/MicroMipsInstrInfo.td @@ -60,6 +60,16 @@ class SCBaseMM<string opstr, RegisterOperand RO> : let Constraints = "$rt = $dst"; } +class LoadMM<string opstr, DAGOperand RO, SDPatternOperator OpNode = null_frag, + InstrItinClass Itin = NoItinerary> : + InstSE<(outs RO:$rt), (ins mem_mm_12:$addr), + !strconcat(opstr, "\t$rt, $addr"), + [(set RO:$rt, (OpNode addrimm12:$addr))], Itin, FrmI> { + let DecoderMethod = "DecodeMemMMImm12"; + let canFoldAsLoad = 1; + let mayLoad = 1; +} + let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { /// Arithmetic Instructions (ALU Immediate) def ADDiu_MM : MMRel, ArithLogicI<"addiu", simm16, GPR32Opnd>, @@ -136,6 +146,8 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { def SW_MM : Store<"sw", GPR32Opnd>, MMRel, LW_FM_MM<0x3e>; } + def LWU_MM : LoadMM<"lwu", GPR32Opnd, zextloadi32, IILoad>, LL_FM_MM<0xe>; + /// Load and Store Instructions - unaligned def LWL_MM : LoadLeftRightMM<"lwl", MipsLWL, GPR32Opnd, mem_mm_12>, LWL_FM_MM<0x0>; |