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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-09 13:15:07 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-05-09 13:15:07 +0000 |
| commit | 08910b08d92dfac9567bf3f7166cd467e38396cc (patch) | |
| tree | 7a9c4322f964e1081da6a5a47195e7faeac4bb1e /lib/Target/Mips/Mips.td | |
| parent | 70f6f7ee3ee9f80612b5f289c6b3f6ab713eeb95 (diff) | |
| download | llvm-08910b08d92dfac9567bf3f7166cd467e38396cc.tar.gz llvm-08910b08d92dfac9567bf3f7166cd467e38396cc.tar.bz2 llvm-08910b08d92dfac9567bf3f7166cd467e38396cc.tar.xz | |
[mips] Remove unused CondMov feature bit
Summary:
No functional change
Depends on D3675
Reviewers: vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D3676
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208410 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips.td')
| -rw-r--r-- | lib/Target/Mips/Mips.td | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/lib/Target/Mips/Mips.td b/lib/Target/Mips/Mips.td index 1149825214..5b9f3c3d3a 100644 --- a/lib/Target/Mips/Mips.td +++ b/lib/Target/Mips/Mips.td @@ -77,8 +77,6 @@ def FeatureVFPU : SubtargetFeature<"vfpu", "HasVFPU", "true", "Enable vector FPU instructions.">; def FeatureSEInReg : SubtargetFeature<"seinreg", "HasSEInReg", "true", "Enable 'signext in register' instructions.">; -def FeatureCondMov : SubtargetFeature<"condmov", "HasCondMov", "true", - "Enable 'conditional move' instructions.">; def FeatureSwap : SubtargetFeature<"swap", "HasSwap", "true", "Enable 'byte/half swap' instructions.">; def FeatureBitCount : SubtargetFeature<"bitcount", "HasBitCount", "true", @@ -99,14 +97,14 @@ def FeatureMips3 : SubtargetFeature<"mips3", "MipsArchVersion", "Mips3", FeatureGP64Bit, FeatureFP64Bit]>; def FeatureMips4 : SubtargetFeature<"mips4", "MipsArchVersion", "Mips4", "MIPS IV ISA Support", - [FeatureMips3, FeatureFPIdx, FeatureCondMov]>; + [FeatureMips3, FeatureFPIdx]>; def FeatureMips5 : SubtargetFeature<"mips5", "MipsArchVersion", "Mips5", "MIPS V ISA Support [highly experimental]", [FeatureMips4]>; def FeatureMips32 : SubtargetFeature<"mips32", "MipsArchVersion", "Mips32", "Mips32 ISA Support", [FeatureMips2, FeatureMips3_32, - FeatureCondMov, FeatureBitCount]>; + FeatureBitCount]>; def FeatureMips32r2 : SubtargetFeature<"mips32r2", "MipsArchVersion", "Mips32r2", "Mips32r2 ISA Support", [FeatureMips32, FeatureSEInReg, FeatureSwap, |