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author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-16 13:18:59 +0000 |
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committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-06-16 13:18:59 +0000 |
commit | 77ae274ae7fb3ca1fe26147a64efd323e59fbd8c (patch) | |
tree | b4253c0bcd29b9562de9f4554f87b9a0d5d5b4bf /lib/Target/Mips/Mips32r6InstrFormats.td | |
parent | af0d72a6f9ef752ad871e53304d22fb5c930adb9 (diff) | |
download | llvm-77ae274ae7fb3ca1fe26147a64efd323e59fbd8c.tar.gz llvm-77ae274ae7fb3ca1fe26147a64efd323e59fbd8c.tar.bz2 llvm-77ae274ae7fb3ca1fe26147a64efd323e59fbd8c.tar.xz |
[mips][mips64r6] cl[oz], and dcl[oz] are re-encoded in MIPS32r6/MIPS64r6
Summary:
There is no change to the restrictions, just the result register is stored
once in the encoding rather than twice. The rt field is zero in
MIPS32r6/MIPS64r6.
Depends on D4119
Reviewers: zoran.jovanovic, jkolek, vmedic
Reviewed By: vmedic
Differential Revision: http://reviews.llvm.org/D4120
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211019 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips/Mips32r6InstrFormats.td')
-rw-r--r-- | lib/Target/Mips/Mips32r6InstrFormats.td | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/lib/Target/Mips/Mips32r6InstrFormats.td b/lib/Target/Mips/Mips32r6InstrFormats.td index 697d550615..051db7525f 100644 --- a/lib/Target/Mips/Mips32r6InstrFormats.td +++ b/lib/Target/Mips/Mips32r6InstrFormats.td @@ -91,6 +91,10 @@ def OPCODE6_LL : OPCODE6<0b110110>; def OPCODE6_LLD : OPCODE6<0b110111>; def OPCODE6_SC : OPCODE6<0b100110>; def OPCODE6_SCD : OPCODE6<0b100111>; +def OPCODE6_CLO : OPCODE6<0b010001>; +def OPCODE6_CLZ : OPCODE6<0b010000>; +def OPCODE6_DCLO : OPCODE6<0b010011>; +def OPCODE6_DCLZ : OPCODE6<0b010010>; class FIELD_FMT<bits<5> Val> { bits<5> Value = Val; @@ -293,6 +297,20 @@ class SPECIAL3_MEM_FM<OPCODE6 Operation> : MipsR6Inst { let Inst{5-0} = Operation.Value; } +class SPECIAL_2R_FM<OPCODE6 Operation> : MipsR6Inst { + bits<5> rd; + bits<5> rs; + + bits<32> Inst; + + let Inst{31-26} = OPGROUP_SPECIAL.Value; + let Inst{25-21} = rs; + let Inst{20-16} = 0b00000; + let Inst{15-11} = rd; + let Inst{10-6} = 0b00001; + let Inst{5-0} = Operation.Value; +} + class SPECIAL_3R_FM<bits<5> mulop, bits<6> funct> : MipsR6Inst { bits<5> rd; bits<5> rs; |