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| author | Sasa Stankovic <Sasa.Stankovic@imgtec.com> | 2014-06-09 14:09:28 +0000 |
|---|---|---|
| committer | Sasa Stankovic <Sasa.Stankovic@imgtec.com> | 2014-06-09 14:09:28 +0000 |
| commit | 49b83e1e7683358de784657c74d838d64f773dba (patch) | |
| tree | d487cbe439338a4355600423f584d8cfc814f97b /lib/Target/Mips | |
| parent | 592d439efee50c81b44285ea718c881281320ce0 (diff) | |
| download | llvm-49b83e1e7683358de784657c74d838d64f773dba.tar.gz llvm-49b83e1e7683358de784657c74d838d64f773dba.tar.bz2 llvm-49b83e1e7683358de784657c74d838d64f773dba.tar.xz | |
[mips] Fix a bug for NaCl target - Don't report the error when non-dangerous
load/store is in branch delay slot.
Differential Revision: http://llvm-reviews.chandlerc.com/D4048
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210470 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/Mips')
| -rw-r--r-- | lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp b/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp index cd6be734df..9a7fc85e91 100644 --- a/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp +++ b/lib/Target/Mips/MCTargetDesc/MipsNaClELFStreamer.cpp @@ -137,18 +137,17 @@ public: &IsStore); bool IsSPFirstOperand = isStackPointerFirstOperand(Inst); if (IsMemAccess || IsSPFirstOperand) { - if (PendingCall) - report_fatal_error("Dangerous instruction in branch delay slot!"); - bool MaskBefore = (IsMemAccess && baseRegNeedsLoadStoreMask(Inst.getOperand(AddrIdx) .getReg())); bool MaskAfter = IsSPFirstOperand && !IsStore; - if (MaskBefore || MaskAfter) + if (MaskBefore || MaskAfter) { + if (PendingCall) + report_fatal_error("Dangerous instruction in branch delay slot!"); sandboxLoadStoreStackChange(Inst, AddrIdx, STI, MaskBefore, MaskAfter); - else - MipsELFStreamer::EmitInstruction(Inst, STI); - return; + return; + } + // fallthrough } // Sandbox calls by aligning call and branch delay to the bundle end. |