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author | Chris Lattner <sabre@nondot.org> | 2006-05-04 17:21:20 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2006-05-04 17:21:20 +0000 |
commit | 63b3d7113d93fda622c4954c6b1d046ce029044e (patch) | |
tree | a1e0a659d24e6615f29a8184a3ae0b23ef6e6e03 /lib/Target/X86/X86InstrBuilder.h | |
parent | ceb408f6a263e319683209ae5c6f8d1e3e4d9b69 (diff) | |
download | llvm-63b3d7113d93fda622c4954c6b1d046ce029044e.tar.gz llvm-63b3d7113d93fda622c4954c6b1d046ce029044e.tar.bz2 llvm-63b3d7113d93fda622c4954c6b1d046ce029044e.tar.xz |
There shalt be only one "immediate" operand type!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28099 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/X86/X86InstrBuilder.h')
-rw-r--r-- | lib/Target/X86/X86InstrBuilder.h | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/lib/Target/X86/X86InstrBuilder.h b/lib/Target/X86/X86InstrBuilder.h index 6a3c116f6d..91a1069757 100644 --- a/lib/Target/X86/X86InstrBuilder.h +++ b/lib/Target/X86/X86InstrBuilder.h @@ -61,7 +61,7 @@ inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB, unsigned Reg) { // Because memory references are always represented with four // values, this adds: Reg, [1, NoReg, 0] to the instruction. - return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(0); + return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(0); } @@ -71,14 +71,14 @@ inline const MachineInstrBuilder &addDirectMem(const MachineInstrBuilder &MIB, /// inline const MachineInstrBuilder &addRegOffset(const MachineInstrBuilder &MIB, unsigned Reg, int Offset) { - return MIB.addReg(Reg).addZImm(1).addReg(0).addSImm(Offset); + return MIB.addReg(Reg).addZImm(1).addReg(0).addImm(Offset); } /// addRegReg - This function is used to add a memory reference of the form: /// [Reg + Reg]. inline const MachineInstrBuilder &addRegReg(const MachineInstrBuilder &MIB, unsigned Reg1, unsigned Reg2) { - return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addSImm(0); + return MIB.addReg(Reg1).addZImm(1).addReg(Reg2).addImm(0); } inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB, @@ -95,7 +95,7 @@ inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB, if (AM.GV) return MIB.addGlobalAddress(AM.GV, AM.Disp); else - return MIB.addSImm(AM.Disp); + return MIB.addImm(AM.Disp); } /// addFrameReference - This function is used to add a reference to the base of @@ -105,7 +105,7 @@ inline const MachineInstrBuilder &addFullAddress(const MachineInstrBuilder &MIB, /// inline const MachineInstrBuilder & addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) { - return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addSImm(Offset); + return MIB.addFrameIndex(FI).addZImm(1).addReg(0).addImm(Offset); } /// addConstantPoolReference - This function is used to add a reference to the @@ -117,7 +117,7 @@ addFrameReference(const MachineInstrBuilder &MIB, int FI, int Offset = 0) { inline const MachineInstrBuilder & addConstantPoolReference(const MachineInstrBuilder &MIB, unsigned CPI, int Offset = 0) { - return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addSImm(Offset); + return MIB.addConstantPoolIndex(CPI).addZImm(1).addReg(0).addImm(Offset); } } // End llvm namespace |