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author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-02 23:07:24 +0000 |
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committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2011-06-02 23:07:24 +0000 |
commit | 4f3fb6d08be511a277f92279e803ae6e95b00126 (patch) | |
tree | 1906d63cdd31b8c9ced9a5ff0032778404623d5e /lib/Target/XCore/XCoreRegisterInfo.td | |
parent | f462e3fac7ac67503657d63dc35330d0b19359b3 (diff) | |
download | llvm-4f3fb6d08be511a277f92279e803ae6e95b00126.tar.gz llvm-4f3fb6d08be511a277f92279e803ae6e95b00126.tar.bz2 llvm-4f3fb6d08be511a277f92279e803ae6e95b00126.tar.xz |
Flag unallocatable register classes instead of giving them empty
allocation orders.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132509 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib/Target/XCore/XCoreRegisterInfo.td')
-rw-r--r-- | lib/Target/XCore/XCoreRegisterInfo.td | 21 |
1 files changed, 3 insertions, 18 deletions
diff --git a/lib/Target/XCore/XCoreRegisterInfo.td b/lib/Target/XCore/XCoreRegisterInfo.td index 765f717e20..b1ba964069 100644 --- a/lib/Target/XCore/XCoreRegisterInfo.td +++ b/lib/Target/XCore/XCoreRegisterInfo.td @@ -70,22 +70,7 @@ def GRRegs : RegisterClass<"XCore", [i32], 32, }]; } -def RRegs : RegisterClass<"XCore", [i32], 32, - // Reserved - [CP, DP, SP, LR]> { - let MethodProtos = [{ - iterator allocation_order_begin(const MachineFunction &MF) const; - iterator allocation_order_end(const MachineFunction &MF) const; - }]; - let MethodBodies = [{ - RRegsClass::iterator - RRegsClass::allocation_order_begin(const MachineFunction &MF) const { - return begin(); - } - RRegsClass::iterator - RRegsClass::allocation_order_end(const MachineFunction &MF) const { - // No allocatable registers - return begin(); - } - }]; +// Reserved +def RRegs : RegisterClass<"XCore", [i32], 32, [CP, DP, SP, LR]> { + let isAllocatable = 0; } |