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authorDevang Patel <dpatel@apple.com>2009-08-22 17:12:53 +0000
committerDevang Patel <dpatel@apple.com>2009-08-22 17:12:53 +0000
commit24f20e083280d979e8fa1bc88959ae9e8339ee99 (patch)
treefdf60e309e78fbbf72b85785fb247d661f7a6705 /lib
parent310ed1364185535949432bfd25a1aca3c5496f87 (diff)
downloadllvm-24f20e083280d979e8fa1bc88959ae9e8339ee99.tar.gz
llvm-24f20e083280d979e8fa1bc88959ae9e8339ee99.tar.bz2
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Record variable debug info at ISel time directly.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@79742 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/AsmPrinter/AsmPrinter.cpp10
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfDebug.cpp59
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfDebug.h12
-rw-r--r--lib/CodeGen/AsmPrinter/DwarfWriter.cpp11
-rw-r--r--lib/CodeGen/PrologEpilogInserter.cpp5
-rw-r--r--lib/CodeGen/SelectionDAG/FastISel.cpp7
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAG.cpp1
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAG.cpp2
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp15
-rw-r--r--lib/Target/ARM/ARMBaseInstrInfo.cpp1
-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp1
-rw-r--r--lib/Target/ARM/ARMISelDAGToDAG.cpp41
-rw-r--r--lib/Target/Blackfin/BlackfinISelLowering.cpp1
-rw-r--r--lib/Target/PowerPC/PPCISelDAGToDAG.cpp41
-rw-r--r--lib/Target/Sparc/SparcISelLowering.cpp1
-rw-r--r--lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp3
-rw-r--r--lib/Target/X86/X86CodeEmitter.cpp1
-rw-r--r--lib/Target/X86/X86ISelDAGToDAG.cpp41
-rw-r--r--lib/Target/X86/X86ISelLowering.cpp2
-rw-r--r--lib/Target/X86/X86InstrInfo.cpp1
20 files changed, 34 insertions, 222 deletions
diff --git a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
index 9bf0b1ae98..8c2800ae2a 100644
--- a/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
+++ b/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
@@ -1567,16 +1567,6 @@ void AsmPrinter::printLabel(unsigned Id) const {
O << TAI->getPrivateGlobalPrefix() << "label" << Id << ":\n";
}
-/// printDeclare - This method prints a local variable declaration used by
-/// debug tables.
-/// FIXME: It doesn't really print anything rather it inserts a DebugVariable
-/// entry into dwarf table.
-void AsmPrinter::printDeclare(const MachineInstr *MI) const {
- unsigned FI = MI->getOperand(0).getIndex();
- GlobalValue *GV = MI->getOperand(1).getGlobal();
- DW->RecordVariable(cast<GlobalVariable>(GV), FI, MI);
-}
-
/// PrintAsmOperand - Print the specified operand of MI, an INLINEASM
/// instruction, using the specified assembler variant. Targets should
/// overried this to format as appropriate.
diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
index 2f4ee5eef1..66b340821c 100644
--- a/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
@@ -1502,7 +1502,6 @@ void DwarfDebug::EndFunction(MachineFunction *MF) {
DbgScopeMap.clear();
DbgAbstractScopeMap.clear();
DbgConcreteScopeMap.clear();
- InlinedVariableScopes.clear();
FunctionDbgScope = NULL;
LexicalScopeStack.clear();
AbstractInstanceRootList.clear();
@@ -1609,8 +1608,7 @@ unsigned DwarfDebug::RecordRegionEnd(GlobalVariable *V) {
}
/// RecordVariable - Indicate the declaration of a local variable.
-void DwarfDebug::RecordVariable(GlobalVariable *GV, unsigned FrameIndex,
- const MachineInstr *MI) {
+void DwarfDebug::RecordVariable(GlobalVariable *GV, unsigned FrameIndex) {
if (TimePassesIsEnabled)
DebugTimer->startTimer();
@@ -1623,18 +1621,22 @@ void DwarfDebug::RecordVariable(GlobalVariable *GV, unsigned FrameIndex,
DIGlobalVariable DG(GV);
Scope = getOrCreateScope(DG.getContext().getGV());
} else {
- DenseMap<const MachineInstr *, DbgScope *>::iterator
- SI = InlinedVariableScopes.find(MI);
-
- if (SI != InlinedVariableScopes.end()) {
- // or GV is an inlined local variable.
- Scope = SI->second;
- InlinedFnVar = true;
- } else {
- DIVariable DV(GV);
- GlobalVariable *V = DV.getContext().getGV();
-
- // or GV is a local variable.
+ bool InlinedVar = false;
+ DIVariable DV(GV);
+ GlobalVariable *V = DV.getContext().getGV();
+ DISubprogram SP(V);
+ if (!SP.isNull()) {
+ // SP is inserted into DbgAbstractScopeMap when inlined function
+ // start was recorded by RecordInlineFnStart.
+ DenseMap<GlobalVariable *, DbgScope *>::iterator
+ I = DbgAbstractScopeMap.find(SP.getGV());
+ if (I != DbgAbstractScopeMap.end()) {
+ InlinedVar = true;
+ Scope = I->second;
+ }
+ }
+ if (!InlinedVar) {
+ // GV is a local variable.
Scope = getOrCreateScope(V);
}
}
@@ -1768,33 +1770,6 @@ unsigned DwarfDebug::RecordInlinedFnEnd(DISubprogram &SP) {
return ID;
}
-/// RecordVariableScope - Record scope for the variable declared by
-/// DeclareMI. DeclareMI must describe TargetInstrInfo::DECLARE. Record scopes
-/// for only inlined subroutine variables. Other variables's scopes are
-/// determined during RecordVariable().
-void DwarfDebug::RecordVariableScope(DIVariable &DV,
- const MachineInstr *DeclareMI) {
- if (TimePassesIsEnabled)
- DebugTimer->startTimer();
-
- DISubprogram SP(DV.getContext().getGV());
-
- if (SP.isNull()) {
- if (TimePassesIsEnabled)
- DebugTimer->stopTimer();
-
- return;
- }
-
- DenseMap<GlobalVariable *, DbgScope *>::iterator
- I = DbgAbstractScopeMap.find(SP.getGV());
- if (I != DbgAbstractScopeMap.end())
- InlinedVariableScopes[DeclareMI] = I->second;
-
- if (TimePassesIsEnabled)
- DebugTimer->stopTimer();
-}
-
//===----------------------------------------------------------------------===//
// Emit Methods
//===----------------------------------------------------------------------===//
diff --git a/lib/CodeGen/AsmPrinter/DwarfDebug.h b/lib/CodeGen/AsmPrinter/DwarfDebug.h
index af76b0b1b1..0844f60911 100644
--- a/lib/CodeGen/AsmPrinter/DwarfDebug.h
+++ b/lib/CodeGen/AsmPrinter/DwarfDebug.h
@@ -154,10 +154,6 @@ class VISIBILITY_HIDDEN DwarfDebug : public Dwarf {
/// information is used to populate debug_inlined section.
DenseMap<GlobalVariable *, SmallVector<unsigned, 4> > InlineInfo;
- /// InlinedVariableScopes - Scopes information for the inlined subroutine
- /// variables.
- DenseMap<const MachineInstr *, DbgScope *> InlinedVariableScopes;
-
/// AbstractInstanceRootMap - Map of abstract instance roots of inlined
/// functions. These are subroutine entries that contain a DW_AT_inline
/// attribute.
@@ -516,8 +512,7 @@ public:
unsigned RecordRegionEnd(GlobalVariable *V);
/// RecordVariable - Indicate the declaration of a local variable.
- void RecordVariable(GlobalVariable *GV, unsigned FrameIndex,
- const MachineInstr *MI);
+ void RecordVariable(GlobalVariable *GV, unsigned FrameIndex);
//// RecordInlinedFnStart - Indicate the start of inlined subroutine.
unsigned RecordInlinedFnStart(DISubprogram &SP, DICompileUnit CU,
@@ -526,11 +521,6 @@ public:
/// RecordInlinedFnEnd - Indicate the end of inlined subroutine.
unsigned RecordInlinedFnEnd(DISubprogram &SP);
- /// RecordVariableScope - Record scope for the variable declared by
- /// DeclareMI. DeclareMI must describe TargetInstrInfo::DECLARE. Record scopes
- /// for only inlined subroutine variables. Other variables's scopes are
- /// determined during RecordVariable().
- void RecordVariableScope(DIVariable &DV, const MachineInstr *DeclareMI);
};
} // End of namespace llvm
diff --git a/lib/CodeGen/AsmPrinter/DwarfWriter.cpp b/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
index 89084989b8..fac1081eec 100644
--- a/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
+++ b/lib/CodeGen/AsmPrinter/DwarfWriter.cpp
@@ -96,9 +96,8 @@ unsigned DwarfWriter::getRecordSourceLineCount() {
/// RecordVariable - Indicate the declaration of a local variable.
///
-void DwarfWriter::RecordVariable(GlobalVariable *GV, unsigned FrameIndex,
- const MachineInstr *MI) {
- DD->RecordVariable(GV, FrameIndex, MI);
+void DwarfWriter::RecordVariable(GlobalVariable *GV, unsigned FrameIndex) {
+ DD->RecordVariable(GV, FrameIndex);
}
/// ShouldEmitDwarfDebug - Returns true if Dwarf debugging declarations should
@@ -119,9 +118,3 @@ unsigned DwarfWriter::RecordInlinedFnEnd(DISubprogram SP) {
return DD->RecordInlinedFnEnd(SP);
}
-/// RecordVariableScope - Record scope for the variable declared by
-/// DeclareMI. DeclareMI must describe TargetInstrInfo::DECLARE.
-void DwarfWriter::RecordVariableScope(DIVariable &DV,
- const MachineInstr *DeclareMI) {
- DD->RecordVariableScope(DV, DeclareMI);
-}
diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp
index 608e4c5763..061ac2a2b5 100644
--- a/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/lib/CodeGen/PrologEpilogInserter.cpp
@@ -637,11 +637,6 @@ void PEI::replaceFrameIndices(MachineFunction &Fn) {
if (RS) RS->enterBasicBlock(BB);
for (MachineBasicBlock::iterator I = BB->begin(); I != BB->end(); ) {
- if (I->getOpcode() == TargetInstrInfo::DECLARE) {
- // Ignore it.
- ++I;
- continue;
- }
if (I->getOpcode() == FrameSetupOpcode ||
I->getOpcode() == FrameDestroyOpcode) {
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index 9496ff2446..4c60b29e91 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -422,12 +422,7 @@ bool FastISel::SelectCall(User *I) {
// Determine the debug globalvariable.
GlobalValue *GV = cast<GlobalVariable>(Variable);
- // Build the DECLARE instruction.
- const TargetInstrDesc &II = TII.get(TargetInstrInfo::DECLARE);
- MachineInstr *DeclareMI
- = BuildMI(MBB, DL, II).addFrameIndex(FI).addGlobalAddress(GV);
- DIVariable DV(cast<GlobalVariable>(GV));
- DW->RecordVariableScope(DV, DeclareMI);
+ DW->RecordVariable(cast<GlobalVariable>(GV), FI);
return true;
}
case Intrinsic::eh_exception: {
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index 82b364730a..9341212495 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -2252,7 +2252,6 @@ void SelectionDAGLegalize::ExpandNode(SDNode *Node,
Results.push_back(DAG.getConstant(1, Node->getValueType(0)));
break;
case ISD::EH_RETURN:
- case ISD::DECLARE:
case ISD::DBG_LABEL:
case ISD::EH_LABEL:
case ISD::PREFETCH:
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
index 6ce30f6864..cc8d565768 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
@@ -512,7 +512,6 @@ static bool doNotCSE(SDNode *N) {
case ISD::DBG_LABEL:
case ISD::DBG_STOPPOINT:
case ISD::EH_LABEL:
- case ISD::DECLARE:
return true; // Never CSE these nodes.
}
@@ -5255,7 +5254,6 @@ std::string SDNode::getOperationName(const SelectionDAG *G) const {
case ISD::INLINEASM: return "inlineasm";
case ISD::DBG_LABEL: return "dbg_label";
case ISD::EH_LABEL: return "eh_label";
- case ISD::DECLARE: return "declare";
case ISD::HANDLENODE: return "handlenode";
// Unary operators
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index b11ab0ec3b..a4cd009bd9 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -3965,14 +3965,23 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
if (OptLevel != CodeGenOpt::None)
// FIXME: Variable debug info is not supported here.
return 0;
-
+ DwarfWriter *DW = DAG.getDwarfWriter();
+ if (!DW)
+ return 0;
DbgDeclareInst &DI = cast<DbgDeclareInst>(I);
if (!isValidDebugInfoIntrinsic(DI, CodeGenOpt::None))
return 0;
Value *Variable = DI.getVariable();
- DAG.setRoot(DAG.getNode(ISD::DECLARE, dl, MVT::Other, getRoot(),
- getValue(DI.getAddress()), getValue(Variable)));
+ Value *Address = DI.getAddress();
+ if (BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
+ Address = BCI->getOperand(0);
+ AllocaInst *AI = dyn_cast<AllocaInst>(Address);
+ // Don't handle byval struct arguments or VLAs, for example.
+ if (!AI)
+ return 0;
+ int FI = FuncInfo.StaticAllocaMap[AI];
+ DW->RecordVariable(cast<GlobalVariable>(Variable), FI);
return 0;
}
case Intrinsic::eh_exception: {
diff --git a/lib/Target/ARM/ARMBaseInstrInfo.cpp b/lib/Target/ARM/ARMBaseInstrInfo.cpp
index b5bfe9d19e..44e5c687b2 100644
--- a/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -423,7 +423,6 @@ unsigned ARMBaseInstrInfo::GetInstSizeInBytes(const MachineInstr *MI) const {
default:
llvm_unreachable("Unknown or unset size field for instr!");
case TargetInstrInfo::IMPLICIT_DEF:
- case TargetInstrInfo::DECLARE:
case TargetInstrInfo::DBG_LABEL:
case TargetInstrInfo::EH_LABEL:
return 0;
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index 6218fceac1..bdb8e6c4c9 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -606,7 +606,6 @@ void Emitter<CodeEmitter>::emitPseudoInstruction(const MachineInstr &MI) {
MCE.emitLabel(MI.getOperand(0).getImm());
break;
case TargetInstrInfo::IMPLICIT_DEF:
- case TargetInstrInfo::DECLARE:
case ARM::DWARF_LOC:
// Do nothing.
break;
diff --git a/lib/Target/ARM/ARMISelDAGToDAG.cpp b/lib/Target/ARM/ARMISelDAGToDAG.cpp
index 8d09549b2d..4c711cb909 100644
--- a/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -1263,47 +1263,6 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
return CurDAG->SelectNodeTo(Op.getNode(), Opc, VT, Ops, 5);
}
- case ISD::DECLARE: {
- SDValue Chain = Op.getOperand(0);
- SDValue N1 = Op.getOperand(1);
- SDValue N2 = Op.getOperand(2);
- FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1);
- // FIXME: handle VLAs.
- if (!FINode) {
- ReplaceUses(Op.getValue(0), Chain);
- return NULL;
- }
- if (N2.getOpcode() == ARMISD::PIC_ADD && isa<LoadSDNode>(N2.getOperand(0)))
- N2 = N2.getOperand(0);
- LoadSDNode *Ld = dyn_cast<LoadSDNode>(N2);
- if (!Ld) {
- ReplaceUses(Op.getValue(0), Chain);
- return NULL;
- }
- SDValue BasePtr = Ld->getBasePtr();
- assert(BasePtr.getOpcode() == ARMISD::Wrapper &&
- isa<ConstantPoolSDNode>(BasePtr.getOperand(0)) &&
- "llvm.dbg.variable should be a constantpool node");
- ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(BasePtr.getOperand(0));
- GlobalValue *GV = 0;
- if (CP->isMachineConstantPoolEntry()) {
- ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)CP->getMachineCPVal();
- GV = ACPV->getGV();
- } else
- GV = dyn_cast<GlobalValue>(CP->getConstVal());
- if (!GV) {
- ReplaceUses(Op.getValue(0), Chain);
- return NULL;
- }
-
- SDValue Tmp1 = CurDAG->getTargetFrameIndex(FINode->getIndex(),
- TLI.getPointerTy());
- SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());
- SDValue Ops[] = { Tmp1, Tmp2, Chain };
- return CurDAG->getTargetNode(TargetInstrInfo::DECLARE, dl,
- MVT::Other, Ops, 3);
- }
-
case ARMISD::VLD2D: {
SDValue MemAddr, MemUpdate, MemOpc;
if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc))
diff --git a/lib/Target/Blackfin/BlackfinISelLowering.cpp b/lib/Target/Blackfin/BlackfinISelLowering.cpp
index 678d6e3e61..1ca1fae9df 100644
--- a/lib/Target/Blackfin/BlackfinISelLowering.cpp
+++ b/lib/Target/Blackfin/BlackfinISelLowering.cpp
@@ -119,7 +119,6 @@ BlackfinTargetLowering::BlackfinTargetLowering(TargetMachine &TM)
setOperationAction(ISD::DEBUG_LOC, MVT::Other, Expand);
setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
- setOperationAction(ISD::DECLARE, MVT::Other, Expand);
// Use the default implementation.
setOperationAction(ISD::VACOPY, MVT::Other, Expand);
diff --git a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 1a068f0981..356ca32830 100644
--- a/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -1094,47 +1094,6 @@ SDNode *PPCDAGToDAGISel::Select(SDValue Op) {
Chain), 0);
return CurDAG->SelectNodeTo(N, PPC::BCTR, MVT::Other, Chain);
}
- case ISD::DECLARE: {
- SDValue Chain = N->getOperand(0);
- SDValue N1 = N->getOperand(1);
- SDValue N2 = N->getOperand(2);
- FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1);
-
- // FIXME: We need to handle this for VLAs.
- if (!FINode) {
- ReplaceUses(Op.getValue(0), Chain);
- return NULL;
- }
-
- if (N2.getOpcode() == ISD::ADD) {
- if (N2.getOperand(0).getOpcode() == ISD::ADD &&
- N2.getOperand(0).getOperand(0).getOpcode() == PPCISD::GlobalBaseReg &&
- N2.getOperand(0).getOperand(1).getOpcode() == PPCISD::Hi &&
- N2.getOperand(1).getOpcode() == PPCISD::Lo)
- N2 = N2.getOperand(0).getOperand(1).getOperand(0);
- else if (N2.getOperand(0).getOpcode() == ISD::ADD &&
- N2.getOperand(0).getOperand(0).getOpcode() == PPCISD::GlobalBaseReg &&
- N2.getOperand(0).getOperand(1).getOpcode() == PPCISD::Lo &&
- N2.getOperand(1).getOpcode() == PPCISD::Hi)
- N2 = N2.getOperand(0).getOperand(1).getOperand(0);
- else if (N2.getOperand(0).getOpcode() == PPCISD::Hi &&
- N2.getOperand(1).getOpcode() == PPCISD::Lo)
- N2 = N2.getOperand(0).getOperand(0);
- }
-
- // If we don't have a global address here, the debug info is mangled, just
- // drop it.
- if (!isa<GlobalAddressSDNode>(N2)) {
- ReplaceUses(Op.getValue(0), Chain);
- return NULL;
- }
- int FI = cast<FrameIndexSDNode>(N1)->getIndex();
- GlobalValue *GV = cast<GlobalAddressSDNode>(N2)->getGlobal();
- SDValue Tmp1 = CurDAG->getTargetFrameIndex(FI, TLI.getPointerTy());
- SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GV, TLI.getPointerTy());
- return CurDAG->SelectNodeTo(N, TargetInstrInfo::DECLARE,
- MVT::Other, Tmp1, Tmp2, Chain);
- }
}
return SelectCode(Op);
diff --git a/lib/Target/Sparc/SparcISelLowering.cpp b/lib/Target/Sparc/SparcISelLowering.cpp
index ebb9806bfa..ae77a8cf47 100644
--- a/lib/Target/Sparc/SparcISelLowering.cpp
+++ b/lib/Target/Sparc/SparcISelLowering.cpp
@@ -661,7 +661,6 @@ SparcTargetLowering::SparcTargetLowering(TargetMachine &TM)
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
setOperationAction(ISD::DBG_LABEL, MVT::Other, Expand);
setOperationAction(ISD::EH_LABEL, MVT::Other, Expand);
- setOperationAction(ISD::DECLARE, MVT::Other, Expand);
setStackPointerRegisterToSaveRestore(SP::O6);
diff --git a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
index 0537b405cf..5701c7cfef 100644
--- a/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
+++ b/lib/Target/X86/AsmPrinter/X86ATTAsmPrinter.cpp
@@ -831,9 +831,6 @@ void X86ATTAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
O << '\t';
printInlineAsm(MI);
return;
- case TargetInstrInfo::DECLARE:
- printDeclare(MI);
- return;
case TargetInstrInfo::IMPLICIT_DEF:
printImplicitDef(MI);
return;
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 7a92742d08..2f78980735 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -595,7 +595,6 @@ void Emitter<CodeEmitter>::emitInstruction(const MachineInstr &MI,
MCE.emitLabel(MI.getOperand(0).getImm());
break;
case TargetInstrInfo::IMPLICIT_DEF:
- case TargetInstrInfo::DECLARE:
case X86::DWARF_LOC:
case X86::FP_REG_KILL:
break;
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index eb6048d50c..076e6c3578 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2052,47 +2052,6 @@ SDNode *X86DAGToDAGISel::Select(SDValue N) {
}
break;
}
-
- case ISD::DECLARE: {
- // Handle DECLARE nodes here because the second operand may have been
- // wrapped in X86ISD::Wrapper.
- SDValue Chain = Node->getOperand(0);
- SDValue N1 = Node->getOperand(1);
- SDValue N2 = Node->getOperand(2);
- FrameIndexSDNode *FINode = dyn_cast<FrameIndexSDNode>(N1);
-
- // FIXME: We need to handle this for VLAs.
- if (!FINode) {
- ReplaceUses(N.getValue(0), Chain);
- return NULL;
- }
-
- if (N2.getOpcode() == ISD::ADD &&
- N2.getOperand(0).getOpcode() == X86ISD::GlobalBaseReg)
- N2 = N2.getOperand(1);
-
- // If N2 is not Wrapper(decriptor) then the llvm.declare is mangled
- // somehow, just ignore it.
- if (N2.getOpcode() != X86ISD::Wrapper &&
- N2.getOpcode() != X86ISD::WrapperRIP) {
- ReplaceUses(N.getValue(0), Chain);
- return NULL;
- }
- GlobalAddressSDNode *GVNode =
- dyn_cast<GlobalAddressSDNode>(N2.getOperand(0));
- if (GVNode == 0) {
- ReplaceUses(N.getValue(0), Chain);
- return NULL;
- }
- SDValue Tmp1 = CurDAG->getTargetFrameIndex(FINode->getIndex(),
- TLI.getPointerTy());
- SDValue Tmp2 = CurDAG->getTargetGlobalAddress(GVNode->getGlobal(),
- TLI.getPointerTy());
- SDValue Ops[] = { Tmp1, Tmp2, Chain };
- return CurDAG->getTargetNode(TargetInstrInfo::DECLARE, dl,
- MVT::Other, Ops,
- array_lengthof(Ops));
- }
}
SDNode *ResNode = SelectCode(N);
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 91b48138f4..72a2727ad4 100644
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -347,7 +347,7 @@ X86TargetLowering::X86TargetLowering(X86TargetMachine &TM)
setOperationAction(ISD::ATOMIC_SWAP, MVT::i64, Custom);
}
- // Use the default ISD::DBG_STOPPOINT, ISD::DECLARE expansion.
+ // Use the default ISD::DBG_STOPPOINT.
setOperationAction(ISD::DBG_STOPPOINT, MVT::Other, Expand);
// FIXME - use subtarget debug flags
if (!Subtarget->isTargetDarwin() &&
diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 6e8561d8e4..b55267dce8 100644
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -3000,7 +3000,6 @@ static unsigned GetInstSizeWithDesc(const MachineInstr &MI,
case TargetInstrInfo::EH_LABEL:
break;
case TargetInstrInfo::IMPLICIT_DEF:
- case TargetInstrInfo::DECLARE:
case X86::DWARF_LOC:
case X86::FP_REG_KILL:
break;