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| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-11-03 00:26:02 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-11-03 00:26:02 +0000 |
| commit | 3c9c1ab7b7549dfaf22456d89bd241a5e8dfc0a4 (patch) | |
| tree | fb7b5638a6eb37c0b6dfc0626e7588cbc0632532 /lib | |
| parent | efcc1aec6459c356c6516e28be29acaa51e876fa (diff) | |
| download | llvm-3c9c1ab7b7549dfaf22456d89bd241a5e8dfc0a4.tar.gz llvm-3c9c1ab7b7549dfaf22456d89bd241a5e8dfc0a4.tar.bz2 llvm-3c9c1ab7b7549dfaf22456d89bd241a5e8dfc0a4.tar.xz | |
[mips] Set flag isAsCheapAsAMove flag on instruction LUi.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@167345 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 3f6cebdc18..3319553935 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -421,7 +421,7 @@ class shift_rotate_reg<bits<6> func, bits<5> isRotate, string instr_asm, // Load Upper Imediate class LoadUpper<bits<6> op, string instr_asm, RegisterClass RC, Operand Imm>: FI<op, (outs RC:$rt), (ins Imm:$imm16), - !strconcat(instr_asm, "\t$rt, $imm16"), [], IIAlu> { + !strconcat(instr_asm, "\t$rt, $imm16"), [], IIAlu>, IsAsCheapAsAMove { let rs = 0; let neverHasSideEffects = 1; let isReMaterializable = 1; |