[mips][msa] Added lsa instruction

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192895 91177308-0d34-0410-b5e6-96231b3b80d8

3 files changed, 30 insertions, 0 deletions

diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td
index 1a8dafb9e3..9a3a8cdb61 100644
--- a/lib/Target/Mips/MipsMSAInstrFormats.td
+++ b/lib/Target/Mips/MipsMSAInstrFormats.td
@@ -314,3 +314,9 @@ class MSA_VECS10_FMT<bits<5> major, bits<6> minor>: MSAInst {
   let Inst{25-21} = major;
   let Inst{5-0} = minor;
 }
+
+class SPECIAL_LSA_FMT: MSAInst {
+  let Inst{25-21} = 0b000000;
+  let Inst{10-8} = 0b000;
+  let Inst{5-0} = 0b000101;
+}
diff --git a/lib/Target/Mips/MipsMSAInstrInfo.td b/lib/Target/Mips/MipsMSAInstrInfo.td
index 778fda1e64..992340d1f9 100644
--- a/lib/Target/Mips/MipsMSAInstrInfo.td
+++ b/lib/Target/Mips/MipsMSAInstrInfo.td
@@ -61,6 +61,10 @@ def MipsVExtractZExt : SDNode<"MipsISD::VEXTRACT_ZEXT_ELT",
 
 // Operands
 
+def uimm2 : Operand<i32> {
+  let PrintMethod = "printUnsignedImm";
+}
+
 def uimm3 : Operand<i32> {
   let PrintMethod = "printUnsignedImm";
 }
@@ -109,6 +113,8 @@ def vsplat_simm5 : Operand<vAny>;
 
 def vsplat_simm10 : Operand<vAny>;
 
+def immZExt2Lsa : ImmLeaf<i32, [{return isUInt<2>(Imm - 1);}]>;
+
 // Pattern fragments
 def vextract_sext_i8  : PatFrag<(ops node:$vec, node:$idx),
                                 (MipsVExtractSExt node:$vec, node:$idx, i8)>;
@@ -762,6 +768,8 @@ class LDI_H_ENC  : MSA_I10_FMT<0b010, 0b01, 0b001100>;
 class LDI_W_ENC  : MSA_I10_FMT<0b010, 0b10, 0b001100>;
 class LDI_D_ENC  : MSA_I10_FMT<0b010, 0b11, 0b001100>;
 
+class LSA_ENC : SPECIAL_LSA_FMT;
+
 class MADD_Q_H_ENC : MSA_3RF_FMT<0b0101, 0b0, 0b011100>;
 class MADD_Q_W_ENC : MSA_3RF_FMT<0b0101, 0b1, 0b011100>;
 
@@ -2038,6 +2046,14 @@ class LDI_H_DESC : MSA_I10_LDI_DESC_BASE<"ldi.h", MSA128H>;
 class LDI_W_DESC : MSA_I10_LDI_DESC_BASE<"ldi.w", MSA128W>;
 class LDI_D_DESC : MSA_I10_LDI_DESC_BASE<"ldi.d", MSA128D>;
 
+class LSA_DESC {
+  dag OutOperandList = (outs GPR32:$rd);
+  dag InOperandList = (ins GPR32:$rs, GPR32:$rt, uimm2:$sa);
+  string AsmString = "lsa\t$rd, $rs, $rt, $sa";
+  list<dag> Pattern = [(set GPR32:$rd, (add GPR32:$rs, (shl GPR32:$rt,
+                                                            immZExt2Lsa:$sa)))];
+  InstrItinClass Itinerary = NoItinerary;
+}
 
 class MADD_Q_H_DESC : MSA_3RF_4RF_DESC_BASE<"madd_q.h", int_mips_madd_q_h,
                                             MSA128HOpnd>;
@@ -2893,6 +2909,8 @@ def LDI_H : LDI_H_ENC, LDI_H_DESC;
 def LDI_W : LDI_W_ENC, LDI_W_DESC;
 def LDI_D : LDI_D_ENC, LDI_D_DESC;
 
+def LSA : LSA_ENC, LSA_DESC;
+
 def MADD_Q_H : MADD_Q_H_ENC, MADD_Q_H_DESC;
 def MADD_Q_W : MADD_Q_W_ENC, MADD_Q_W_DESC;
 
diff --git a/lib/Target/Mips/MipsSEISelLowering.cpp b/lib/Target/Mips/MipsSEISelLowering.cpp
index 9b23304cbd..def8957632 100644
--- a/lib/Target/Mips/MipsSEISelLowering.cpp
+++ b/lib/Target/Mips/MipsSEISelLowering.cpp
@@ -1403,6 +1403,12 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op,
   case Intrinsic::mips_ldi_w:
   case Intrinsic::mips_ldi_d:
     return lowerMSASplatImm(Op, 1, DAG);
+  case Intrinsic::mips_lsa: {
+    EVT ResTy = Op->getValueType(0);
+    return DAG.getNode(ISD::ADD, SDLoc(Op), ResTy, Op->getOperand(1),
+                       DAG.getNode(ISD::SHL, SDLoc(Op), ResTy,
+                                   Op->getOperand(2), Op->getOperand(3)));
+  }
   case Intrinsic::mips_maddv_b:
   case Intrinsic::mips_maddv_h:
   case Intrinsic::mips_maddv_w: