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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-11 07:56:09 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2010-07-11 07:56:09 +0000 |
| commit | 8e18a1a5cf4423dba9b8c53f2699299c514a9dc2 (patch) | |
| tree | ed25e24a2a46b9420ccedcef005a60b57114f156 /lib | |
| parent | 377b7b7ca3a28e2329abd1f22b9bc0482635ccce (diff) | |
| download | llvm-8e18a1a5cf4423dba9b8c53f2699299c514a9dc2.tar.gz llvm-8e18a1a5cf4423dba9b8c53f2699299c514a9dc2.tar.bz2 llvm-8e18a1a5cf4423dba9b8c53f2699299c514a9dc2.tar.xz | |
Replace copyRegToReg with copyPhysReg for Sparc.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108086 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.cpp | 36 | ||||
| -rw-r--r-- | lib/Target/Sparc/SparcInstrInfo.h | 10 |
2 files changed, 18 insertions, 28 deletions
diff --git a/lib/Target/Sparc/SparcInstrInfo.cpp b/lib/Target/Sparc/SparcInstrInfo.cpp index cfdfd99624..6f2ff6dcdd 100644 --- a/lib/Target/Sparc/SparcInstrInfo.cpp +++ b/lib/Target/Sparc/SparcInstrInfo.cpp @@ -117,29 +117,21 @@ SparcInstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, return 1; } -bool SparcInstrInfo::copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator I, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC, - DebugLoc DL) const { - if (DestRC != SrcRC) { - // Not yet supported! - return false; - } - - if (DestRC == SP::IntRegsRegisterClass) - BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0).addReg(SrcReg); - else if (DestRC == SP::FPRegsRegisterClass) - BuildMI(MBB, I, DL, get(SP::FMOVS), DestReg).addReg(SrcReg); - else if (DestRC == SP::DFPRegsRegisterClass) - BuildMI(MBB, I, DL, get(Subtarget.isV9() ? SP::FMOVD : SP::FpMOVD),DestReg) - .addReg(SrcReg); +void SparcInstrInfo::copyPhysReg(MachineBasicBlock &MBB, + MachineBasicBlock::iterator I, DebugLoc DL, + unsigned DestReg, unsigned SrcReg, + bool KillSrc) const { + if (SP::IntRegsRegClass.contains(DestReg, SrcReg)) + BuildMI(MBB, I, DL, get(SP::ORrr), DestReg).addReg(SP::G0) + .addReg(SrcReg, getKillRegState(KillSrc)); + else if (SP::FPRegsRegClass.contains(DestReg, SrcReg)) + BuildMI(MBB, I, DL, get(SP::FMOVS), DestReg) + .addReg(SrcReg, getKillRegState(KillSrc)); + else if (SP::DFPRegsRegClass.contains(DestReg, SrcReg)) + BuildMI(MBB, I, DL, get(Subtarget.isV9() ? SP::FMOVD : SP::FpMOVD), DestReg) + .addReg(SrcReg, getKillRegState(KillSrc)); else - // Can't copy this register - return false; - - return true; + llvm_unreachable("Impossible reg-to-reg copy"); } void SparcInstrInfo:: diff --git a/lib/Target/Sparc/SparcInstrInfo.h b/lib/Target/Sparc/SparcInstrInfo.h index 9df3ee5c73..11680c37f9 100644 --- a/lib/Target/Sparc/SparcInstrInfo.h +++ b/lib/Target/Sparc/SparcInstrInfo.h @@ -71,12 +71,10 @@ public: const SmallVectorImpl<MachineOperand> &Cond, DebugLoc DL) const; - virtual bool copyRegToReg(MachineBasicBlock &MBB, - MachineBasicBlock::iterator I, - unsigned DestReg, unsigned SrcReg, - const TargetRegisterClass *DestRC, - const TargetRegisterClass *SrcRC, - DebugLoc DL) const; + virtual void copyPhysReg(MachineBasicBlock &MBB, + MachineBasicBlock::iterator I, DebugLoc DL, + unsigned DestReg, unsigned SrcReg, + bool KillSrc) const; virtual void storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, |