summaryrefslogtreecommitdiff
path: root/lib
diff options
context:
space:
mode:
authorJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-17 23:26:52 +0000
committerJakob Stoklund Olesen <stoklund@2pi.dk>2011-06-17 23:26:52 +0000
commitbed9711ca81e2bfe24df46ae2147417df4b3902e (patch)
tree61133bb9a0b708a4a97fa95f192d58183df2df1a /lib
parent8936b947760a278b6371335f3411de647989c665 (diff)
downloadllvm-bed9711ca81e2bfe24df46ae2147417df4b3902e.tar.gz
llvm-bed9711ca81e2bfe24df46ae2147417df4b3902e.tar.bz2
llvm-bed9711ca81e2bfe24df46ae2147417df4b3902e.tar.xz
Only call TRI::getRawAllocationOrder to resolve a target-dependent hint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133313 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/CodeGen/RegAllocLinearScan.cpp8
1 files changed, 6 insertions, 2 deletions
diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp
index 0818034c15..7a2ea6c408 100644
--- a/lib/CodeGen/RegAllocLinearScan.cpp
+++ b/lib/CodeGen/RegAllocLinearScan.cpp
@@ -1440,8 +1440,12 @@ unsigned RALinScan::getFreePhysReg(LiveInterval* cur,
if (TargetRegisterInfo::isVirtualRegister(physReg) && vrm_->hasPhys(physReg))
physReg = vrm_->getPhys(physReg);
- ArrayRef<unsigned> Order = tri_->getRawAllocationOrder(RC, Hint.first,
- physReg, *mf_);
+ ArrayRef<unsigned> Order;
+ if (Hint.first)
+ Order = tri_->getRawAllocationOrder(RC, Hint.first, physReg, *mf_);
+ else
+ Order = RegClassInfo.getOrder(RC);
+
assert(!Order.empty() && "No allocatable register in this register class!");
// Scan for the first available register.