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authorTom Stellard <thomas.stellard@amd.com>2013-07-23 01:47:46 +0000
committerTom Stellard <thomas.stellard@amd.com>2013-07-23 01:47:46 +0000
commitd7a472c9c696ebf010835d9254fb15036e558d84 (patch)
treee6e5f9ed5db11befbccfd96665714e6bd1bd61ee /lib
parent5e4fa97a1ddf066a43773ca9152f038dd1d00a9a (diff)
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R600: Expand vector FNEG
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186913 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'lib')
-rw-r--r--lib/Target/R600/AMDGPUISelLowering.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp
index 2a4e44f862..d74d9f89c3 100644
--- a/lib/Target/R600/AMDGPUISelLowering.cpp
+++ b/lib/Target/R600/AMDGPUISelLowering.cpp
@@ -78,6 +78,9 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) :
setOperationAction(ISD::LOAD, MVT::f64, Promote);
AddPromotedToType(ISD::LOAD, MVT::f64, MVT::i64);
+ setOperationAction(ISD::FNEG, MVT::v2f32, Expand);
+ setOperationAction(ISD::FNEG, MVT::v4f32, Expand);
+
setOperationAction(ISD::MUL, MVT::i64, Expand);
setOperationAction(ISD::UDIV, MVT::i32, Expand);