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| author | Jim Grosbach <grosbach@apple.com> | 2010-09-17 21:58:46 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2010-09-17 21:58:46 +0000 |
| commit | 9ce75625ebb43e9b4fa2a1f7a8611f07640bbe2b (patch) | |
| tree | 29c21d12e3c168895df12786e2ed430b237c5e08 /test/CodeGen/ARM/long_shift.ll | |
| parent | f437f733484169cf67f7c3e798908bbf27175580 (diff) | |
| download | llvm-9ce75625ebb43e9b4fa2a1f7a8611f07640bbe2b.tar.gz llvm-9ce75625ebb43e9b4fa2a1f7a8611f07640bbe2b.tar.bz2 llvm-9ce75625ebb43e9b4fa2a1f7a8611f07640bbe2b.tar.xz | |
Update tests to handle MC-inst instruction printing of shift operations. The
legacy asm printer uses instructions of the form, "mov r0, r0, lsl #3", while
the MC-instruction printer uses the form "lsl r0, r0, #3". The latter mnemonic
is correct and preferred according the ARM documentation (A8.6.98). The former
are pseudo-instructions for the latter.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114221 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM/long_shift.ll')
| -rw-r--r-- | test/CodeGen/ARM/long_shift.ll | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll index 1ec4d15f66..43d58ecbd4 100644 --- a/test/CodeGen/ARM/long_shift.ll +++ b/test/CodeGen/ARM/long_shift.ll @@ -14,7 +14,7 @@ define i64 @f0(i64 %A, i64 %B) { define i32 @f1(i64 %x, i64 %y) { ; CHECK: f1 -; CHECK: mov r0, r0, lsl r2 +; CHECK: lsl{{.*}}r2 %a = shl i64 %x, %y %b = trunc i64 %a to i32 ret i32 %b @@ -22,7 +22,7 @@ define i32 @f1(i64 %x, i64 %y) { define i32 @f2(i64 %x, i64 %y) { ; CHECK: f2 -; CHECK: mov r0, r0, lsr r2 +; CHECK: lsr{{.*}}r2 ; CHECK-NEXT: rsb r3, r2, #32 ; CHECK-NEXT: subs r2, r2, #32 ; CHECK-NEXT: orr r0, r0, r1, lsl r3 @@ -34,7 +34,7 @@ define i32 @f2(i64 %x, i64 %y) { define i32 @f3(i64 %x, i64 %y) { ; CHECK: f3 -; CHECK: mov r0, r0, lsr r2 +; CHECK: lsr{{.*}}r2 ; CHECK-NEXT: rsb r3, r2, #32 ; CHECK-NEXT: subs r2, r2, #32 ; CHECK-NEXT: orr r0, r0, r1, lsl r3 |