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author | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:43:50 +0000 |
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committer | Bradley Smith <bradley.smith@arm.com> | 2014-04-09 14:43:50 +0000 |
commit | 37fe6627f6790f969d27563f37113cedbf4e0a36 (patch) | |
tree | 8ae316e6d4ec4128fda0663018ba8633c6e81de0 /test/CodeGen/ARM64 | |
parent | 6af2db2222a54d8e83755123f7830f9eff60507e (diff) | |
download | llvm-37fe6627f6790f969d27563f37113cedbf4e0a36.tar.gz llvm-37fe6627f6790f969d27563f37113cedbf4e0a36.tar.bz2 llvm-37fe6627f6790f969d27563f37113cedbf4e0a36.tar.xz |
[ARM64] Rename FP to the UAL-compliant 'X29'.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205884 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/ARM64')
-rw-r--r-- | test/CodeGen/ARM64/abi.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/ARM64/abi_align.ll | 39 | ||||
-rw-r--r-- | test/CodeGen/ARM64/fast-isel-alloca.ll | 1 | ||||
-rw-r--r-- | test/CodeGen/ARM64/fast-isel-call.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM64/frameaddr.ll | 8 | ||||
-rw-r--r-- | test/CodeGen/ARM64/hello.ll | 20 | ||||
-rw-r--r-- | test/CodeGen/ARM64/patchpoint.ll | 4 | ||||
-rw-r--r-- | test/CodeGen/ARM64/returnaddr.ll | 8 |
8 files changed, 45 insertions, 41 deletions
diff --git a/test/CodeGen/ARM64/abi.ll b/test/CodeGen/ARM64/abi.ll index a7693b6ba9..e2de434c7b 100644 --- a/test/CodeGen/ARM64/abi.ll +++ b/test/CodeGen/ARM64/abi.ll @@ -77,6 +77,7 @@ entry: ; CHECK: fixed_4i ; CHECK: str [[REG_1:q[0-9]+]], [sp, #16] ; FAST: fixed_4i +; FAST: sub sp, sp, #64 ; FAST: mov x[[ADDR:[0-9]+]], sp ; FAST: str [[REG_1:q[0-9]+]], [x[[ADDR]], #16] %0 = load <4 x i32>* %in, align 16 @@ -130,6 +131,7 @@ entry: ; CHECK: test3 ; CHECK: str [[REG_1:d[0-9]+]], [sp, #8] ; FAST: test3 +; FAST: sub sp, sp, #32 ; FAST: mov x[[ADDR:[0-9]+]], sp ; FAST: str [[REG_1:d[0-9]+]], [x[[ADDR]], #8] %0 = load <2 x i32>* %in, align 8 diff --git a/test/CodeGen/ARM64/abi_align.ll b/test/CodeGen/ARM64/abi_align.ll index 61c661e48f..d8ec3958ba 100644 --- a/test/CodeGen/ARM64/abi_align.ll +++ b/test/CodeGen/ARM64/abi_align.ll @@ -294,7 +294,7 @@ entry: ; FAST: sub sp, sp, #96 ; Space for s1 is allocated at fp-24 = sp+72 ; Space for s2 is allocated at sp+48 -; FAST: sub x[[A:[0-9]+]], fp, #24 +; FAST: sub x[[A:[0-9]+]], x29, #24 ; FAST: add x[[A:[0-9]+]], sp, #48 ; Call memcpy with size = 24 (0x18) ; FAST: orr {{x[0-9]+}}, xzr, #0x18 @@ -317,17 +317,17 @@ declare i32 @f42_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, define i32 @caller42_stack() #3 { entry: ; CHECK: caller42_stack -; CHECK: mov fp, sp +; CHECK: mov x29, sp ; CHECK: sub sp, sp, #96 -; CHECK: stur {{x[0-9]+}}, [fp, #-16] -; CHECK: stur {{q[0-9]+}}, [fp, #-32] +; CHECK: stur {{x[0-9]+}}, [x29, #-16] +; CHECK: stur {{q[0-9]+}}, [x29, #-32] ; CHECK: str {{x[0-9]+}}, [sp, #48] ; CHECK: str {{q[0-9]+}}, [sp, #32] -; Space for s1 is allocated at fp-32 = sp+64 +; Space for s1 is allocated at x29-32 = sp+64 ; Space for s2 is allocated at sp+32 ; CHECK: add x[[B:[0-9]+]], sp, #32 ; CHECK: str x[[B]], [sp, #16] -; CHECK: sub x[[A:[0-9]+]], fp, #32 +; CHECK: sub x[[A:[0-9]+]], x29, #32 ; Address of s1 is passed on stack at sp+8 ; CHECK: str x[[A]], [sp, #8] ; CHECK: movz w[[C:[0-9]+]], #9 @@ -336,8 +336,8 @@ entry: ; FAST: caller42_stack ; Space for s1 is allocated at fp-24 ; Space for s2 is allocated at fp-48 -; FAST: sub x[[A:[0-9]+]], fp, #24 -; FAST: sub x[[B:[0-9]+]], fp, #48 +; FAST: sub x[[A:[0-9]+]], x29, #24 +; FAST: sub x[[B:[0-9]+]], x29, #48 ; Call memcpy with size = 24 (0x18) ; FAST: orr {{x[0-9]+}}, xzr, #0x18 ; FAST: str {{w[0-9]+}}, [sp] @@ -399,7 +399,7 @@ entry: ; Space for s2 is allocated at sp ; FAST: caller43 -; FAST: mov fp, sp +; FAST: mov x29, sp ; Space for s1 is allocated at sp+32 ; Space for s2 is allocated at sp ; FAST: add x1, sp, #32 @@ -429,17 +429,17 @@ declare i32 @f43_stack(i32 %i, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, define i32 @caller43_stack() #3 { entry: ; CHECK: caller43_stack -; CHECK: mov fp, sp +; CHECK: mov x29, sp ; CHECK: sub sp, sp, #96 -; CHECK: stur {{q[0-9]+}}, [fp, #-16] -; CHECK: stur {{q[0-9]+}}, [fp, #-32] +; CHECK: stur {{q[0-9]+}}, [x29, #-16] +; CHECK: stur {{q[0-9]+}}, [x29, #-32] ; CHECK: str {{q[0-9]+}}, [sp, #48] ; CHECK: str {{q[0-9]+}}, [sp, #32] -; Space for s1 is allocated at fp-32 = sp+64 +; Space for s1 is allocated at x29-32 = sp+64 ; Space for s2 is allocated at sp+32 ; CHECK: add x[[B:[0-9]+]], sp, #32 ; CHECK: str x[[B]], [sp, #16] -; CHECK: sub x[[A:[0-9]+]], fp, #32 +; CHECK: sub x[[A:[0-9]+]], x29, #32 ; Address of s1 is passed on stack at sp+8 ; CHECK: str x[[A]], [sp, #8] ; CHECK: movz w[[C:[0-9]+]], #9 @@ -449,12 +449,12 @@ entry: ; FAST: sub sp, sp, #96 ; Space for s1 is allocated at fp-32 = sp+64 ; Space for s2 is allocated at sp+32 -; FAST: sub x[[A:[0-9]+]], fp, #32 +; FAST: sub x[[A:[0-9]+]], x29, #32 ; FAST: add x[[B:[0-9]+]], sp, #32 -; FAST: stur {{x[0-9]+}}, [fp, #-32] -; FAST: stur {{x[0-9]+}}, [fp, #-24] -; FAST: stur {{x[0-9]+}}, [fp, #-16] -; FAST: stur {{x[0-9]+}}, [fp, #-8] +; FAST: stur {{x[0-9]+}}, [x29, #-32] +; FAST: stur {{x[0-9]+}}, [x29, #-24] +; FAST: stur {{x[0-9]+}}, [x29, #-16] +; FAST: stur {{x[0-9]+}}, [x29, #-8] ; FAST: str {{x[0-9]+}}, [sp, #32] ; FAST: str {{x[0-9]+}}, [sp, #40] ; FAST: str {{x[0-9]+}}, [sp, #48] @@ -487,6 +487,7 @@ entry: ; CHECK: str {{w[0-9]+}}, [sp, #16] ; CHECK: stp {{x[0-9]+}}, {{x[0-9]+}}, [sp] ; FAST: i128_split +; FAST: sub sp, sp, #48 ; FAST: mov x[[ADDR:[0-9]+]], sp ; FAST: str {{w[0-9]+}}, [x[[ADDR]], #16] ; FAST: stp {{x[0-9]+}}, {{x[0-9]+}}, [x[[ADDR]]] diff --git a/test/CodeGen/ARM64/fast-isel-alloca.ll b/test/CodeGen/ARM64/fast-isel-alloca.ll index 8bbee16232..1706e9eba2 100644 --- a/test/CodeGen/ARM64/fast-isel-alloca.ll +++ b/test/CodeGen/ARM64/fast-isel-alloca.ll @@ -14,6 +14,7 @@ entry: define void @main() nounwind { entry: ; CHECK: main +; CHECK: mov x29, sp ; CHECK: mov x[[REG:[0-9]+]], sp ; CHECK-NEXT: orr x[[REG1:[0-9]+]], xzr, #0x8 ; CHECK-NEXT: add x0, x[[REG]], x[[REG1]] diff --git a/test/CodeGen/ARM64/fast-isel-call.ll b/test/CodeGen/ARM64/fast-isel-call.ll index be0ca688da..637ce2898f 100644 --- a/test/CodeGen/ARM64/fast-isel-call.ll +++ b/test/CodeGen/ARM64/fast-isel-call.ll @@ -24,8 +24,8 @@ entry: define i32 @foo1(i32 %a) nounwind { entry: ; CHECK: foo1 -; CHECK: stur w0, [fp, #-4] -; CHECK-NEXT: ldur w0, [fp, #-4] +; CHECK: stur w0, [x29, #-4] +; CHECK-NEXT: ldur w0, [x29, #-4] ; CHECK-NEXT: bl _call1 %a.addr = alloca i32, align 4 store i32 %a, i32* %a.addr, align 4 diff --git a/test/CodeGen/ARM64/frameaddr.ll b/test/CodeGen/ARM64/frameaddr.ll index d0635adfe7..e7cff60e23 100644 --- a/test/CodeGen/ARM64/frameaddr.ll +++ b/test/CodeGen/ARM64/frameaddr.ll @@ -3,10 +3,10 @@ define i8* @t() nounwind { entry: ; CHECK-LABEL: t: -; CHECK: stp fp, lr, [sp, #-16]! -; CHECK: mov fp, sp -; CHECK: mov x0, fp -; CHECK: ldp fp, lr, [sp], #16 +; CHECK: stp x29, lr, [sp, #-16]! +; CHECK: mov x29, sp +; CHECK: mov x0, x29 +; CHECK: ldp x29, lr, [sp], #16 ; CHECK: ret %0 = call i8* @llvm.frameaddress(i32 0) ret i8* %0 diff --git a/test/CodeGen/ARM64/hello.ll b/test/CodeGen/ARM64/hello.ll index f870fff688..06efacb76c 100644 --- a/test/CodeGen/ARM64/hello.ll +++ b/test/CodeGen/ARM64/hello.ll @@ -2,27 +2,27 @@ ; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s --check-prefix=CHECK-LINUX ; CHECK-LABEL: main: -; CHECK: stp fp, lr, [sp, #-16]! -; CHECK-NEXT: mov fp, sp +; CHECK: stp x29, lr, [sp, #-16]! +; CHECK-NEXT: mov x29, sp ; CHECK-NEXT: sub sp, sp, #16 -; CHECK-NEXT: stur wzr, [fp, #-4] +; CHECK-NEXT: stur wzr, [x29, #-4] ; CHECK: adrp x0, L_.str@PAGE ; CHECK: add x0, x0, L_.str@PAGEOFF ; CHECK-NEXT: bl _puts -; CHECK-NEXT: mov sp, fp -; CHECK-NEXT: ldp fp, lr, [sp], #16 +; CHECK-NEXT: mov sp, x29 +; CHECK-NEXT: ldp x29, lr, [sp], #16 ; CHECK-NEXT: ret ; CHECK-LINUX-LABEL: main: -; CHECK-LINUX: stp fp, lr, [sp, #-16]! -; CHECK-LINUX-NEXT: mov fp, sp +; CHECK-LINUX: stp x29, lr, [sp, #-16]! +; CHECK-LINUX-NEXT: mov x29, sp ; CHECK-LINUX-NEXT: sub sp, sp, #16 -; CHECK-LINUX-NEXT: stur wzr, [fp, #-4] +; CHECK-LINUX-NEXT: stur wzr, [x29, #-4] ; CHECK-LINUX: adrp x0, .L.str ; CHECK-LINUX: add x0, x0, :lo12:.L.str ; CHECK-LINUX-NEXT: bl puts -; CHECK-LINUX-NEXT: mov sp, fp -; CHECK-LINUX-NEXT: ldp fp, lr, [sp], #16 +; CHECK-LINUX-NEXT: mov sp, x29 +; CHECK-LINUX-NEXT: ldp x29, lr, [sp], #16 ; CHECK-LINUX-NEXT: ret @.str = private unnamed_addr constant [7 x i8] c"hello\0A\00" diff --git a/test/CodeGen/ARM64/patchpoint.ll b/test/CodeGen/ARM64/patchpoint.ll index 993e3eb233..c9f63d931d 100644 --- a/test/CodeGen/ARM64/patchpoint.ll +++ b/test/CodeGen/ARM64/patchpoint.ll @@ -25,10 +25,10 @@ entry: ; as a leaf function. ; ; CHECK-LABEL: caller_meta_leaf -; CHECK: mov fp, sp +; CHECK: mov x29, sp ; CHECK-NEXT: sub sp, sp, #32 ; CHECK: Ltmp -; CHECK: mov sp, fp +; CHECK: mov sp, x29 ; CHECK: ret define void @caller_meta_leaf() { diff --git a/test/CodeGen/ARM64/returnaddr.ll b/test/CodeGen/ARM64/returnaddr.ll index e06ce9072e..76c8e18799 100644 --- a/test/CodeGen/ARM64/returnaddr.ll +++ b/test/CodeGen/ARM64/returnaddr.ll @@ -12,12 +12,12 @@ entry: define i8* @rt2() nounwind readnone { entry: ; CHECK-LABEL: rt2: -; CHECK: stp fp, lr, [sp, #-16]! -; CHECK: mov fp, sp -; CHECK: ldr x[[REG:[0-9]+]], [fp] +; CHECK: stp x29, lr, [sp, #-16]! +; CHECK: mov x29, sp +; CHECK: ldr x[[REG:[0-9]+]], [x29] ; CHECK: ldr x[[REG2:[0-9]+]], [x[[REG]]] ; CHECK: ldr x0, [x[[REG2]], #8] -; CHECK: ldp fp, lr, [sp], #16 +; CHECK: ldp x29, lr, [sp], #16 ; CHECK: ret %0 = tail call i8* @llvm.returnaddress(i32 2) ret i8* %0 |