diff options
| author | Lang Hames <lhames@gmail.com> | 2011-11-02 22:52:45 +0000 |
|---|---|---|
| committer | Lang Hames <lhames@gmail.com> | 2011-11-02 22:52:45 +0000 |
| commit | 1a1d1fcc0b955420cdbe0b94bd01c46d4e96b429 (patch) | |
| tree | ebbb35c2786b45f442362268bd94bf67b3321d57 /test/CodeGen | |
| parent | d69568723d3e95c010f7252127bcd9f3913ffa85 (diff) | |
| download | llvm-1a1d1fcc0b955420cdbe0b94bd01c46d4e96b429.tar.gz llvm-1a1d1fcc0b955420cdbe0b94bd01c46d4e96b429.tar.bz2 llvm-1a1d1fcc0b955420cdbe0b94bd01c46d4e96b429.tar.xz | |
Try to lower memset/memcpy/memmove to vector instructions on ARM where the alignment permits.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143582 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/ARM/2011-10-26-memset-with-neon.ll | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll b/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll new file mode 100644 index 0000000000..3c9216cde7 --- /dev/null +++ b/test/CodeGen/ARM/2011-10-26-memset-with-neon.ll @@ -0,0 +1,20 @@ +; RUN: llc -march=arm -mcpu=cortex-a8 < %s | FileCheck %s + +; Should trigger a NEON store. +; CHECK: vstr.64 +define void @f_0_12(i8* nocapture %c) nounwind optsize { +entry: + call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 12, i32 8, i1 false) + ret void +} + +; Trigger multiple NEON stores. +; CHECK: vstmia +; CHECK-NEXT: vstmia +define void @f_0_40(i8* nocapture %c) nounwind optsize { +entry: + call void @llvm.memset.p0i8.i64(i8* %c, i8 0, i64 40, i32 16, i1 false) + ret void +} + +declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i32, i1) nounwind |