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| author | Tom Stellard <thomas.stellard@amd.com> | 2014-05-09 16:42:21 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-05-09 16:42:21 +0000 |
| commit | 300094fd84c9929677deba807399464e69e69b9e (patch) | |
| tree | 6c143e44e4fa46033d749fb36e11624474b2327f /test/CodeGen | |
| parent | 561bb4452595b3a0c02ccc9d89634f988a12f13c (diff) | |
| download | llvm-300094fd84c9929677deba807399464e69e69b9e.tar.gz llvm-300094fd84c9929677deba807399464e69e69b9e.tar.bz2 llvm-300094fd84c9929677deba807399464e69e69b9e.tar.xz | |
R600/SI: Fix SMRD pattern for offsets > 32 bits
We were dropping the high bits of 64-bit immediate offsets.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208431 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/R600/smrd.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/R600/smrd.ll b/test/CodeGen/R600/smrd.ll index af22b0da8b..dec61855b0 100644 --- a/test/CodeGen/R600/smrd.ll +++ b/test/CodeGen/R600/smrd.ll @@ -34,6 +34,24 @@ entry: ret void } +; SMRD load with a 64-bit offset +; CHECK-LABEL: @smrd3 +; CHECK-DAG: S_MOV_B32 s[[SHI:[0-9]+]], 4 +; CHECK-DAG: S_MOV_B32 s[[SLO:[0-9]+]], 0 +; FIXME: We don't need to copy these values to VGPRs +; CHECK-DAG: V_MOV_B32_e32 v[[VHI:[0-9]+]], s[[SHI]] +; CHECK-DAG: V_MOV_B32_e32 v[[VLO:[0-9]+]], s[[SLO]] +; FIXME: We should be able to use S_LOAD_DWORD here +; BUFFER_LOAD_DWORD v{{[0-9]+}}, s[{{[0-9]+:[0-9]+}}] + v[[[VLO]]:[[VHI]]] + 0x0 + +define void @smrd3(i32 addrspace(1)* %out, i32 addrspace(2)* %ptr) { +entry: + %0 = getelementptr i32 addrspace(2)* %ptr, i64 4294967296 ; 2 ^ 32 + %1 = load i32 addrspace(2)* %0 + store i32 %1, i32 addrspace(1)* %out + ret void +} + ; SMRD load using the load.const intrinsic with an immediate offset ; CHECK-LABEL: @smrd_load_const0 ; CHECK: S_BUFFER_LOAD_DWORD s{{[0-9]}}, s[{{[0-9]:[0-9]}}], 0x4 ; encoding: [0x04 |