diff options
| author | Amara Emerson <amara.emerson@arm.com> | 2013-10-11 11:07:00 +0000 |
|---|---|---|
| committer | Amara Emerson <amara.emerson@arm.com> | 2013-10-11 11:07:00 +0000 |
| commit | 4fc2774b438c6c09f487362e53d5ac1a84edea73 (patch) | |
| tree | d1d089de98cb2d6315a963982d50873355b5e576 /test/CodeGen | |
| parent | a6e253ddd0f757101fe97105d60a1e098ca5f33c (diff) | |
| download | llvm-4fc2774b438c6c09f487362e53d5ac1a84edea73.tar.gz llvm-4fc2774b438c6c09f487362e53d5ac1a84edea73.tar.bz2 llvm-4fc2774b438c6c09f487362e53d5ac1a84edea73.tar.xz | |
[ARM] Add a test case for disabled neon/fpu features.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192440 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/ARM/no-fpu.ll | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/no-fpu.ll b/test/CodeGen/ARM/no-fpu.ll new file mode 100644 index 0000000000..fff4bccb80 --- /dev/null +++ b/test/CodeGen/ARM/no-fpu.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon,-vfp2 | FileCheck --check-prefix=NONEON-NOVFP %s +; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon | FileCheck --check-prefix=NONEON %s +; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-vfp2 | FileCheck --check-prefix=NOVFP %s +; RUN: llc < %s -mtriple=armv7-none-gnueabi -mattr=-neon,+vfp2 | FileCheck --check-prefix=NONEON-VFP %s + +; Check no NEON instructions are selected when feature is disabled. +define void @neonop(i64* nocapture readonly %a, i64* nocapture %b) #0 { + %1 = bitcast i64* %a to <2 x i64>* + %wide.load = load <2 x i64>* %1, align 8 + ; NONEON-NOVFP-NOT: vld1.64 + ; NONEON-NOT: vld1.64 + %add = add <2 x i64> %wide.load, %wide.load + ; NONEON-NOVFP-NOT: vadd.i64 + ; NONEON-NOT: vadd.i64 + %2 = bitcast i64* %b to <2 x i64>* + store <2 x i64> %add, <2 x i64>* %2, align 8 + ; NONEON-NOVFP-NOT: vst1.64 + ; NONEON-NOT: vst1.64 + ret void +} + +; Likewise with VFP instructions. +define double @fpmult(double %a, double %b) { + %res = fmul double %a, %b + ; NONEON-NOVFP-NOT: vmov + ; NONEON-NOVFP-NOT: vmul.f64 + ; NOVFP-NOT: vmov + ; NOVFP-NOT: vmul.f64 + ; NONEON-VFP: vmov + ; NONEON-VFP: vmul.f64 + ret double %res +} + |