summaryrefslogtreecommitdiff
path: root/test/CodeGen
diff options
context:
space:
mode:
authorAndrew Trick <atrick@apple.com>2013-05-29 22:03:55 +0000
committerAndrew Trick <atrick@apple.com>2013-05-29 22:03:55 +0000
commit6e0b2a0cb0d398f175a5294bf0ad5488c714e8c2 (patch)
tree8ef279826ff76c91b57c9f7ebb0d7ad09e62b561 /test/CodeGen
parent8df6f4bc8be1680e98b9ce7a7bb868b129c016ab (diff)
downloadllvm-6e0b2a0cb0d398f175a5294bf0ad5488c714e8c2.tar.gz
llvm-6e0b2a0cb0d398f175a5294bf0ad5488c714e8c2.tar.bz2
llvm-6e0b2a0cb0d398f175a5294bf0ad5488c714e8c2.tar.xz
Order CALLSEQ_START and CALLSEQ_END nodes.
Fixes PR16146: gdb.base__call-ar-st.exp fails after pre-RA-sched=source fixes. Patch by Xiaoyi Guo! This also fixes an unsupported dbg.value test case. Codegen was previously incorrect but the test was passing by luck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182885 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/ARM/crash-greedy-v6.ll19
-rw-r--r--test/CodeGen/X86/dbg-const.ll16
2 files changed, 23 insertions, 12 deletions
diff --git a/test/CodeGen/ARM/crash-greedy-v6.ll b/test/CodeGen/ARM/crash-greedy-v6.ll
index bac4d270e0..e165dbdf08 100644
--- a/test/CodeGen/ARM/crash-greedy-v6.ll
+++ b/test/CodeGen/ARM/crash-greedy-v6.ll
@@ -1,5 +1,5 @@
; RUN: llc -disable-fp-elim -relocation-model=pic < %s
-; RUN: llc -disable-fp-elim -relocation-model=pic -pre-RA-sched=source < %s | FileCheck %s --check-prefix=SOURCE-SCHED
+; RUN: llc -disable-fp-elim -relocation-model=pic -O0 -pre-RA-sched=source < %s | FileCheck %s --check-prefix=SOURCE-SCHED
target triple = "armv6-apple-ios"
; Reduced from 177.mesa. This test causes a live range split before an LDR_POST instruction.
@@ -12,23 +12,22 @@ for.body.lr.ph: ; preds = %entry
br label %for.body
for.body: ; preds = %for.body, %for.body.lr.ph
-; SOURCE-SCHED: str
-; SOURCE-SCHED: add
-; SOURCE-SCHED: sub
; SOURCE-SCHED: ldr
; SOURCE-SCHED: ldr
-; SOURCE-SCHED: str
-; SOURCE-SCHED: str
-; SOURCE-SCHED: str
-; SOURCE-SCHED: str
; SOURCE-SCHED: add
+; SOURCE-SCHED: ldr
; SOURCE-SCHED: add
+; SOURCE-SCHED: ldr
; SOURCE-SCHED: add
+; SOURCE-SCHED: ldr
; SOURCE-SCHED: add
; SOURCE-SCHED: str
-; SOURCE-SCHED: mov
-; SOURCE-SCHED: bl
+; SOURCE-SCHED: str
+; SOURCE-SCHED: str
+; SOURCE-SCHED: str
; SOURCE-SCHED: ldr
+; SOURCE-SCHED: bl
+; SOURCE-SCHED: add
; SOURCE-SCHED: ldr
; SOURCE-SCHED: cmp
; SOURCE-SCHED: bne
diff --git a/test/CodeGen/X86/dbg-const.ll b/test/CodeGen/X86/dbg-const.ll
index 5c2e62bc91..2ac359d33d 100644
--- a/test/CodeGen/X86/dbg-const.ll
+++ b/test/CodeGen/X86/dbg-const.ll
@@ -1,14 +1,26 @@
; RUN: llc < %s - | FileCheck %s
+;
+; FIXME: A potentially more interesting test case would be:
+; %call = @bar()
+; dbg.value j=0
+; %call2 = @bar()
+; dbg.value j=%call
+;
+; We cannot current handle the above sequence because codegenprepare
+; hoists the second dbg.value above %call2, which then appears to
+; conflict with j=0. It does this because SelectionDAG cannot handle
+; global debug values.
+
target triple = "x86_64-apple-darwin10.0.0"
;CHECK: ## DW_OP_constu
;CHECK-NEXT: .byte 42
define i32 @foobar() nounwind readonly noinline ssp {
entry:
- %call = tail call i32 @bar(), !dbg !11
tail call void @llvm.dbg.value(metadata !8, i64 0, metadata !6), !dbg !9
- %call2 = tail call i32 @bar(), !dbg !11
+ %call = tail call i32 @bar(), !dbg !11
tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !6), !dbg !11
+ %call2 = tail call i32 @bar(), !dbg !11
%add = add nsw i32 %call2, %call, !dbg !12
ret i32 %add, !dbg !10
}