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author | Oliver Stannard <oliver.stannard@arm.com> | 2014-02-20 17:19:26 +0000 |
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committer | Oliver Stannard <oliver.stannard@arm.com> | 2014-02-20 17:19:26 +0000 |
commit | 71f63717a831b3a78be35d9c1e13e4e5ab9680a0 (patch) | |
tree | 787bc1cef5ea4ca9c65ba9f7ae604121f16297ad /test/CodeGen | |
parent | fda2dfbca7ba09177f876e6a7cc3140be800ae0d (diff) | |
download | llvm-71f63717a831b3a78be35d9c1e13e4e5ab9680a0.tar.gz llvm-71f63717a831b3a78be35d9c1e13e4e5ab9680a0.tar.bz2 llvm-71f63717a831b3a78be35d9c1e13e4e5ab9680a0.tar.xz |
AArch64: __va_list.__stack must be 8-byte aligned
The va_start macro for AArch64 must set va_list.__stack to the address
following the last named argument on the stack, rounded up to an alignment
of 8 bytes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201797 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r-- | test/CodeGen/AArch64/variadic.ll | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/test/CodeGen/AArch64/variadic.ll b/test/CodeGen/AArch64/variadic.ll index 0e99e79115..1c7f1e04ab 100644 --- a/test/CodeGen/AArch64/variadic.ll +++ b/test/CodeGen/AArch64/variadic.ll @@ -197,3 +197,45 @@ define void @test_va_copy() { ; CHECK: ret ; CHECK-NOFP: ret } + +%struct.s_3i = type { i32, i32, i32 } + +; This checks that, if the last named argument is not a multiple of 8 bytes, +; and is allocated on the stack, that __va_list.__stack is initialised to the +; first 8-byte aligned location above it. +define void @test_va_odd_struct_on_stack(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, [1 x i64], %struct.s_3i* byval nocapture readnone align 4 %h, ...) { +; CHECK-LABEL: test_va_odd_struct_on_stack: + +; CHECK: sub sp, sp, #128 +; CHECK: mov x[[FPRBASE:[0-9]+]], sp +; CHECK: str q7, [x[[FPRBASE]], #112] + +; CHECK-NOT: str x{{[0-9]+}}, + +; CHECK-NOFP-NOT: str q7, +; CHECK-NOT: str x7, + +; Omit the middle ones + +; CHECK: str q0, [sp] + + %addr = bitcast %va_list* @var to i8* + call void @llvm.va_start(i8* %addr) +; CHECK: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, #:lo12:var +; CHECK: movn [[VR_OFFS:w[0-9]+]], #127 +; CHECK: str [[VR_OFFS]], [x[[VA_LIST]], #28] +; CHECK: str wzr, [x[[VA_LIST]], #24] +; CHECK: add [[VR_TOP:x[0-9]+]], x[[FPRBASE]], #128 +; CHECK: str [[VR_TOP]], [x[[VA_LIST]], #16] +; This constant would be #140 if it was not 8-byte aligned +; CHECK: add [[STACK:x[0-9]+]], sp, #144 +; CHECK: str [[STACK]], [{{x[0-9]+}}, #:lo12:var] + +; CHECK-NOFP: add x[[VA_LIST:[0-9]+]], {{x[0-9]+}}, #:lo12:var +; This constant would be #12 if it was not 8-byte aligned +; CHECK-NOFP: add [[STACK:x[0-9]+]], sp, #16 +; CHECK-NOFP: str [[STACK]], [{{x[0-9]+}}, #:lo12:var] +; CHECK-NOFP: str wzr, [x[[VA_LIST]], #28] +; CHECK-NOFP: str wzr, [x[[VA_LIST]], #24] + ret void +} |