diff options
| author | Kalle Raiskila <kalle.raiskila@nokia.com> | 2011-03-04 12:00:11 +0000 |
|---|---|---|
| committer | Kalle Raiskila <kalle.raiskila@nokia.com> | 2011-03-04 12:00:11 +0000 |
| commit | 7f5de8b4c64280587c2c9a9a0ba4e1ada7e050e5 (patch) | |
| tree | 41940f56bf039958143853931d82bb79f18bb353 /test/CodeGen | |
| parent | 786792784e898f29febb3e7270d54b0e21e3c904 (diff) | |
| download | llvm-7f5de8b4c64280587c2c9a9a0ba4e1ada7e050e5.tar.gz llvm-7f5de8b4c64280587c2c9a9a0ba4e1ada7e050e5.tar.bz2 llvm-7f5de8b4c64280587c2c9a9a0ba4e1ada7e050e5.tar.xz | |
Allow load from constant on SPU.
A 'load <4 x i32>* null' crashes llc before this fix.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126995 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/CellSPU/loads.ll | 7 | ||||
| -rw-r--r-- | test/CodeGen/CellSPU/stores.ll | 8 |
2 files changed, 15 insertions, 0 deletions
diff --git a/test/CodeGen/CellSPU/loads.ll b/test/CodeGen/CellSPU/loads.ll index 03d7ad1153..4771752f5f 100644 --- a/test/CodeGen/CellSPU/loads.ll +++ b/test/CodeGen/CellSPU/loads.ll @@ -50,3 +50,10 @@ define i32 @load_misaligned( i32* %ptr ){ %rv = load i32* %ptr, align 2 ret i32 %rv } + +define <4 x i32> @load_null_vec( ) { +;CHECK: lqa +;CHECK: bi $lr + %rv = load <4 x i32>* null + ret <4 x i32> %rv +} diff --git a/test/CodeGen/CellSPU/stores.ll b/test/CodeGen/CellSPU/stores.ll index 7e0bf06b4e..6ca5b08923 100644 --- a/test/CodeGen/CellSPU/stores.ll +++ b/test/CodeGen/CellSPU/stores.ll @@ -171,3 +171,11 @@ define void @store_v8( <8 x float> %val, <8 x float>* %ptr ) store <8 x float> %val, <8 x float>* %ptr ret void } + +define void @store_null_vec( <4 x i32> %val ) { +; FIXME - this is for some reason compiled into a il+stqd, not a sta. +;CHECK: stqd +;CHECK: bi $lr + store <4 x i32> %val, <4 x i32>* null + ret void +} |