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| author | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-05-28 04:07:29 +0000 |
|---|---|---|
| committer | Bruno Cardoso Lopes <bruno.cardoso@gmail.com> | 2011-05-28 04:07:29 +0000 |
| commit | a0112d0c39aa31fe555ecf7296923ca30f68f811 (patch) | |
| tree | 6b0172862586c64805ec0dcae66c7a08ca8ee264 /test/CodeGen | |
| parent | fea51fc007598176d48fb7319a9bf471efb93127 (diff) | |
| download | llvm-a0112d0c39aa31fe555ecf7296923ca30f68f811.tar.gz llvm-a0112d0c39aa31fe555ecf7296923ca30f68f811.tar.bz2 llvm-a0112d0c39aa31fe555ecf7296923ca30f68f811.tar.xz | |
Add support for ARM ldrexd/strexd intrinsics. They both use i32 register pairs
to load/store i64 values. Since there's no current support to explicitly
declare such restrictions, implement it by using specific hardcoded register
pairs during isel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132248 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/ARM/ldstrexd.ll | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/ldstrexd.ll b/test/CodeGen/ARM/ldstrexd.ll new file mode 100644 index 0000000000..0c0911a86e --- /dev/null +++ b/test/CodeGen/ARM/ldstrexd.ll @@ -0,0 +1,33 @@ +; RUN: llc < %s -mtriple=armv7-apple-darwin | FileCheck %s +; RUN: llc < %s -mtriple=thumbv7-apple-darwin | FileCheck %s + +%0 = type { i32, i32 } + +; CHECK: f0: +; CHECK: ldrexd +define i64 @f0(i8* %p) nounwind readonly { +entry: + %ldrexd = tail call %0 @llvm.arm.ldrexd(i8* %p) + %0 = extractvalue %0 %ldrexd, 1 + %1 = extractvalue %0 %ldrexd, 0 + %2 = zext i32 %0 to i64 + %3 = zext i32 %1 to i64 + %shl = shl nuw i64 %2, 32 + %4 = or i64 %shl, %3 + ret i64 %4 +} + +; CHECK: f1: +; CHECK: strexd +define i32 @f1(i8* %ptr, i64 %val) nounwind { +entry: + %tmp4 = trunc i64 %val to i32 + %tmp6 = lshr i64 %val, 32 + %tmp7 = trunc i64 %tmp6 to i32 + %strexd = tail call i32 @llvm.arm.strexd(i32 %tmp4, i32 %tmp7, i8* %ptr) + ret i32 %strexd +} + +declare %0 @llvm.arm.ldrexd(i8*) nounwind readonly +declare i32 @llvm.arm.strexd(i32, i32, i8*) nounwind + |