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authorJason W Kim <jason.w.kim.2009@gmail.com>2010-12-08 23:14:44 +0000
committerJason W Kim <jason.w.kim.2009@gmail.com>2010-12-08 23:14:44 +0000
commita0871e79270b2a05f93c9df73bbe24c587faa94e (patch)
tree3573415ed7aa63cb80652cc63cd59fac3bf124ee /test/CodeGen
parent7685ff84ada08d63c8b67618d54ab7eb1fcae365 (diff)
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ARM/MC/ELF TPsoft is now a proper pseudo inst.
Added test to check bl __aeabi_read_tp gets emitted properly for ELF/ASM as well as ELF/OBJ (including fixup) Also added support for ELF::R_ARM_TLS_IE32 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121312 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
-rw-r--r--test/CodeGen/ARM/2010-12-08-tpsoft.ll52
1 files changed, 52 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/2010-12-08-tpsoft.ll b/test/CodeGen/ARM/2010-12-08-tpsoft.ll
new file mode 100644
index 0000000000..b8ed8199d3
--- /dev/null
+++ b/test/CodeGen/ARM/2010-12-08-tpsoft.ll
@@ -0,0 +1,52 @@
+; RUN: llc %s -mtriple=armv7-linux-gnueabi -o - | \
+; RUN: FileCheck -check-prefix=ELFASM %s
+; RUN: llc %s -mtriple=armv7-linux-gnueabi -filetype=obj -o - | \
+; RUN: elf-dump --dump-section-data | FileCheck -check-prefix=ELFOBJ %s
+
+;; Make sure that bl __aeabi_read_tp is materiazlied and fixed up correctly
+;; in the obj case.
+
+@i = external thread_local global i32
+@a = external global i8
+@b = external global [10 x i8]
+
+define arm_aapcs_vfpcc i32 @main() nounwind {
+entry:
+ %0 = load i32* @i, align 4
+ switch i32 %0, label %bb2 [
+ i32 12, label %bb
+ i32 13, label %bb1
+ ]
+
+bb: ; preds = %entry
+ %1 = tail call arm_aapcs_vfpcc i32 @foo(i8* @a) nounwind
+ ret i32 %1
+; ELFASM: bl __aeabi_read_tp
+
+
+; ELFOBJ: '.text'
+; ELFOBJ-NEXT: 'sh_type'
+; ELFOBJ-NEXT: 'sh_flags'
+; ELFOBJ-NEXT: 'sh_addr'
+; ELFOBJ-NEXT: 'sh_offset'
+; ELFOBJ-NEXT: 'sh_size'
+; ELFOBJ-NEXT: 'sh_link'
+; ELFOBJ-NEXT: 'sh_info'
+; ELFOBJ-NEXT: 'sh_addralign'
+; ELFOBJ-NEXT: 'sh_entsize'
+;;; BL __aeabi_read_tp is ---+
+;;; V
+; ELFOBJ-NEXT: 00482de9 3c009fe5 00109fe7 feffffeb
+
+
+bb1: ; preds = %entry
+ %2 = tail call arm_aapcs_vfpcc i32 @bar(i32* bitcast ([10 x i8]* @b to i32*)) nounwind
+ ret i32 %2
+
+bb2: ; preds = %entry
+ ret i32 -1
+}
+
+declare arm_aapcs_vfpcc i32 @foo(i8*)
+
+declare arm_aapcs_vfpcc i32 @bar(i32*)