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| author | Justin Holewinski <jholewinski@nvidia.com> | 2013-08-06 14:13:31 +0000 |
|---|---|---|
| committer | Justin Holewinski <jholewinski@nvidia.com> | 2013-08-06 14:13:31 +0000 |
| commit | a3635eefc749389aed84d9791fab657297203e1b (patch) | |
| tree | 613f5d28fe902b437c84eebdf89c60eb5f60c9ce /test/CodeGen | |
| parent | 82767327c59ede1f8663ec9b9a64a668993d501f (diff) | |
| download | llvm-a3635eefc749389aed84d9791fab657297203e1b.tar.gz llvm-a3635eefc749389aed84d9791fab657297203e1b.tar.bz2 llvm-a3635eefc749389aed84d9791fab657297203e1b.tar.xz | |
[NVPTX] Fix bug in stack code generation causes by MC conversion
We do use a very small set of physical registers, so account for
them in the virtual register encoding between MachineInstr and MC
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187799 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/NVPTX/local-stack-frame.ll | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/test/CodeGen/NVPTX/local-stack-frame.ll b/test/CodeGen/NVPTX/local-stack-frame.ll new file mode 100644 index 0000000000..178dff1a5d --- /dev/null +++ b/test/CodeGen/NVPTX/local-stack-frame.ll @@ -0,0 +1,18 @@ +; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX32 +; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX64 + +; Ensure we access the local stack properly + +; PTX32: mov.u32 %r{{[0-9]+}}, __local_depot{{[0-9]+}}; +; PTX32: cvta.local.u32 %SP, %r{{[0-9]+}}; +; PTX32: ld.param.u32 %r{{[0-9]+}}, [foo_param_0]; +; PTX32: st.u32 [%SP+0], %r{{[0-9]+}}; +; PTX64: mov.u64 %rl{{[0-9]+}}, __local_depot{{[0-9]+}}; +; PTX64: cvta.local.u64 %SP, %rl{{[0-9]+}}; +; PTX64: ld.param.u32 %r{{[0-9]+}}, [foo_param_0]; +; PTX64: st.u32 [%SP+0], %r{{[0-9]+}}; +define void @foo(i32 %a) { + %local = alloca i32, align 4 + store i32 %a, i32* %local + ret void +} |