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| author | Tom Stellard <thomas.stellard@amd.com> | 2013-07-12 18:15:08 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2013-07-12 18:15:08 +0000 |
| commit | d2442c10f9bfe8a9d6cdcb28030d32deb5b192b1 (patch) | |
| tree | ac1365c977003b8bbafb4a5891e95f3d856ccbf4 /test/CodeGen | |
| parent | 54453c11b429a4f90f64bd83e113c69008cbd9ed (diff) | |
| download | llvm-d2442c10f9bfe8a9d6cdcb28030d32deb5b192b1.tar.gz llvm-d2442c10f9bfe8a9d6cdcb28030d32deb5b192b1.tar.bz2 llvm-d2442c10f9bfe8a9d6cdcb28030d32deb5b192b1.tar.xz | |
R600/SI: Add double precision fsub pattern for SI
Patch by: Niels Ole Salscheider
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186179 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/R600/fsub64.ll | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/test/CodeGen/R600/fsub64.ll b/test/CodeGen/R600/fsub64.ll new file mode 100644 index 0000000000..fa59dcc394 --- /dev/null +++ b/test/CodeGen/R600/fsub64.ll @@ -0,0 +1,13 @@ +; RUN: llc < %s -march=r600 -mcpu=tahiti | FileCheck %s + +; CHECK: @fsub_f64 +; CHECK: V_ADD_F64 {{VGPR[0-9]+_VGPR[0-9]+, VGPR[0-9]+_VGPR[0-9]+, VGPR[0-9]+_VGPR[0-9]+}}, 0, 0, 0, 0, 2 + +define void @fsub_f64(double addrspace(1)* %out, double addrspace(1)* %in1, + double addrspace(1)* %in2) { + %r0 = load double addrspace(1)* %in1 + %r1 = load double addrspace(1)* %in2 + %r2 = fsub double %r0, %r1 + store double %r2, double addrspace(1)* %out + ret void +} |