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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-02-27 09:24:31 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2014-02-27 09:24:31 +0000 |
| commit | fb1e26d9a22d5da7ba00ea73f4989d3643556ff0 (patch) | |
| tree | b86d7367049e885eec07803dc398ad38f0d296c4 /test/CodeGen | |
| parent | 9e443ca92a2b2dc89b3dea9a67bb8ab205e25777 (diff) | |
| download | llvm-fb1e26d9a22d5da7ba00ea73f4989d3643556ff0.tar.gz llvm-fb1e26d9a22d5da7ba00ea73f4989d3643556ff0.tar.bz2 llvm-fb1e26d9a22d5da7ba00ea73f4989d3643556ff0.tar.xz | |
Stop test/CodeGen/X86/v4i32load-crash.ll targeting non-X86-64 targets.
Summary:
Fixes an issue where a test attempts to use -mcpu=x86-64 on non-X86-64 targets.
This triggers an assertion in the MIPS backend since it doesn't know what ABI to
use by default for unrecognized processors.
CC: llvm-commits, rafael
Differential Revision: http://llvm-reviews.chandlerc.com/D2877
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202369 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/X86/v4i32load-crash.ll | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/test/CodeGen/X86/v4i32load-crash.ll b/test/CodeGen/X86/v4i32load-crash.ll index 052c4c3c61..3e7f9e63c9 100644 --- a/test/CodeGen/X86/v4i32load-crash.ll +++ b/test/CodeGen/X86/v4i32load-crash.ll @@ -1,10 +1,11 @@ -; RUN: llc --mcpu=x86-64 --mattr=ssse3 < %s +; RUN: llc --march=x86 --mcpu=x86-64 --mattr=ssse3 < %s +; RUN: llc --march=x86-64 --mcpu=x86-64 --mattr=ssse3 < %s ;PR18045: ;Issue of selection for 'v4i32 load'. ;This instruction is not legal for X86 CPUs with sse < 'sse4.1'. ;This node was generated by X86ISelLowering.cpp, EltsFromConsecutiveLoads -;static function after legilize stage. +;static function after legalize stage. @e = external global [4 x i32], align 4 @f = external global [4 x i32], align 4 |