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| author | Dan Gohman <gohman@apple.com> | 2010-06-24 22:23:02 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2010-06-24 22:23:02 +0000 |
| commit | fe5e4dabbf05f3b7b8c6d652adb6b500e5dec8cd (patch) | |
| tree | 619dbedc7b8ae8534fca64d1c00849787ab73213 /test/CodeGen | |
| parent | f241b26792c12ca1819685d8640ea08d676c9cc0 (diff) | |
| download | llvm-fe5e4dabbf05f3b7b8c6d652adb6b500e5dec8cd.tar.gz llvm-fe5e4dabbf05f3b7b8c6d652adb6b500e5dec8cd.tar.bz2 llvm-fe5e4dabbf05f3b7b8c6d652adb6b500e5dec8cd.tar.xz | |
Teach EmitLiveInCopies to omit copies for unused virtual registers,
and to clean up unused incoming physregs from the live-in list.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106805 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen')
| -rw-r--r-- | test/CodeGen/ARM/long_shift.ll | 8 | ||||
| -rw-r--r-- | test/CodeGen/X86/sse3.ll | 6 |
2 files changed, 7 insertions, 7 deletions
diff --git a/test/CodeGen/ARM/long_shift.ll b/test/CodeGen/ARM/long_shift.ll index 76332cc290..688b7bc312 100644 --- a/test/CodeGen/ARM/long_shift.ll +++ b/test/CodeGen/ARM/long_shift.ll @@ -23,10 +23,10 @@ define i32 @f1(i64 %x, i64 %y) { define i32 @f2(i64 %x, i64 %y) { ; CHECK: f2 ; CHECK: mov r0, r0, lsr r2 -; CHECK-NEXT: rsb r12, r2, #32 +; CHECK-NEXT: rsb r3, r2, #32 ; CHECK-NEXT: sub r2, r2, #32 ; CHECK-NEXT: cmp r2, #0 -; CHECK-NEXT: orr r0, r0, r1, lsl r12 +; CHECK-NEXT: orr r0, r0, r1, lsl r3 ; CHECK-NEXT: movge r0, r1, asr r2 %a = ashr i64 %x, %y %b = trunc i64 %a to i32 @@ -36,10 +36,10 @@ define i32 @f2(i64 %x, i64 %y) { define i32 @f3(i64 %x, i64 %y) { ; CHECK: f3 ; CHECK: mov r0, r0, lsr r2 -; CHECK-NEXT: rsb r12, r2, #32 +; CHECK-NEXT: rsb r3, r2, #32 ; CHECK-NEXT: sub r2, r2, #32 ; CHECK-NEXT: cmp r2, #0 -; CHECK-NEXT: orr r0, r0, r1, lsl r12 +; CHECK-NEXT: orr r0, r0, r1, lsl r3 ; CHECK-NEXT: movge r0, r1, lsr r2 %a = lshr i64 %x, %y %b = trunc i64 %a to i32 diff --git a/test/CodeGen/X86/sse3.ll b/test/CodeGen/X86/sse3.ll index b969ecb414..206cdff1ba 100644 --- a/test/CodeGen/X86/sse3.ll +++ b/test/CodeGen/X86/sse3.ll @@ -63,10 +63,10 @@ define <8 x i16> @t4(<8 x i16> %A, <8 x i16> %B) nounwind { ret <8 x i16> %tmp ; X64: t4: ; X64: pextrw $7, %xmm0, %eax -; X64: pshufhw $100, %xmm0, %xmm2 -; X64: pinsrw $1, %eax, %xmm2 +; X64: pshufhw $100, %xmm0, %xmm1 +; X64: pinsrw $1, %eax, %xmm1 ; X64: pextrw $1, %xmm0, %eax -; X64: movdqa %xmm2, %xmm0 +; X64: movdqa %xmm1, %xmm0 ; X64: pinsrw $4, %eax, %xmm0 ; X64: ret } |