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| author | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2014-06-10 13:11:35 +0000 |
|---|---|---|
| committer | Artyom Skrobov <Artyom.Skrobov@arm.com> | 2014-06-10 13:11:35 +0000 |
| commit | 45a31492d5475a1744966a0cd5e631694b29f953 (patch) | |
| tree | 1de64d9289e04769ccf7bf00324df191e33f9634 /test/MC/AArch64/basic-a64-diagnostics.s | |
| parent | 8316a97e024de3b335386922a6c3b6e1a7b197f5 (diff) | |
| download | llvm-45a31492d5475a1744966a0cd5e631694b29f953.tar.gz llvm-45a31492d5475a1744966a0cd5e631694b29f953.tar.bz2 llvm-45a31492d5475a1744966a0cd5e631694b29f953.tar.xz | |
Condition codes AL and NV are invalid in the aliases that use
inverted condition codes (CINC, CINV, CNEG, CSET, and CSETM).
Matching aliases based on "immediate classes", when disassembling,
wasn't previously supported, hence adding MCOperandPredicate
into class Operand, and implementing the support for it
in AsmWriterEmitter.
The parsing for those aliases was already custom, so just adding
the missing condition into AArch64AsmParser::parseCondCode.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210528 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/AArch64/basic-a64-diagnostics.s')
| -rw-r--r-- | test/MC/AArch64/basic-a64-diagnostics.s | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/test/MC/AArch64/basic-a64-diagnostics.s b/test/MC/AArch64/basic-a64-diagnostics.s index a4a3b1379c..b33891cc3d 100644 --- a/test/MC/AArch64/basic-a64-diagnostics.s +++ b/test/MC/AArch64/basic-a64-diagnostics.s @@ -1345,39 +1345,59 @@ cset wsp, lt csetm sp, ge + cset w1, al + csetm x6, nv // CHECK-ERROR: error: invalid operand for instruction // CHECK-ERROR-NEXT: cset wsp, lt // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: invalid operand for instruction // CHECK-ERROR-NEXT: csetm sp, ge // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: cset w1, al +// CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: csetm x6, nv +// CHECK-ERROR-NEXT: ^ cinc w3, wsp, ne cinc sp, x9, eq + cinc x2, x0, nv // CHECK-ERROR: error: invalid operand for instruction // CHECK-ERROR-NEXT: cinc w3, wsp, ne // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: invalid operand for instruction // CHECK-ERROR-NEXT: cinc sp, x9, eq // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: cinc x2, x0, nv +// CHECK-ERROR-NEXT: ^ cinv w3, wsp, ne cinv sp, x9, eq + cinv w8, x7, nv // CHECK-ERROR: error: invalid operand for instruction // CHECK-ERROR-NEXT: cinv w3, wsp, ne // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: invalid operand for instruction // CHECK-ERROR-NEXT: cinv sp, x9, eq // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: cinv w8, x7, nv +// CHECK-ERROR-NEXT: ^ cneg w3, wsp, ne cneg sp, x9, eq + cneg x4, x5, al // CHECK-ERROR: error: invalid operand for instruction // CHECK-ERROR-NEXT: cneg w3, wsp, ne // CHECK-ERROR-NEXT: ^ // CHECK-ERROR-NEXT: error: invalid operand for instruction // CHECK-ERROR-NEXT: cneg sp, x9, eq // CHECK-ERROR-NEXT: ^ +// CHECK-ERROR-NEXT: error: condition codes AL and NV are invalid for this instruction +// CHECK-ERROR-NEXT: cneg x4, x5, al +// CHECK-ERROR-NEXT: ^ //------------------------------------------------------------------------------ // Data Processing (1 source) |