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author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-01-10 04:38:35 +0000 |
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committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-01-10 04:38:35 +0000 |
commit | 003132d48cbb371c9bf059de4740f6d1e4142868 (patch) | |
tree | 428165346109dd75102bc03c82ea0824bddda693 /test/MC/ARM/arm-memory-instructions.s | |
parent | 4eeee88e912cc03208b5ead91563a7519ec4ab73 (diff) | |
download | llvm-003132d48cbb371c9bf059de4740f6d1e4142868.tar.gz llvm-003132d48cbb371c9bf059de4740f6d1e4142868.tar.bz2 llvm-003132d48cbb371c9bf059de4740f6d1e4142868.tar.xz |
ARM IAS: support GNU extension for ldrd, strd
The GNU assembler has an extension that allows for the elision of the paired
register (dt2) for the LDRD and STRD mnemonics. Add support for this in the
assembly parser. Canonicalise the usage during the instruction parsing from
the specified version.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198915 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM/arm-memory-instructions.s')
-rw-r--r-- | test/MC/ARM/arm-memory-instructions.s | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/test/MC/ARM/arm-memory-instructions.s b/test/MC/ARM/arm-memory-instructions.s index ad35dd26a0..f41c779b8f 100644 --- a/test/MC/ARM/arm-memory-instructions.s +++ b/test/MC/ARM/arm-memory-instructions.s @@ -485,3 +485,14 @@ Lbaz: .quad 0 @ CHECK: strht r8, [r1], #-25 @ encoding: [0xb9,0x81,0x61,0xe0] @ CHECK: strht r5, [r3], r4 @ encoding: [0xb4,0x50,0xa3,0xe0] @ CHECK: strht r6, [r8], -r0 @ encoding: [0xb0,0x60,0x28,0xe0] + +@------------------------------------------------------------------------------ +@ GNU Assembler Compatibility +@------------------------------------------------------------------------------ + + ldrd r0, [sp] + strd r0, [sp] + +@ CHECK: ldrd r0, r1, [sp] @ encoding: [0xd0,0x00,0xcd,0xe1] +@ CHECK: strd r0, r1, [sp] @ encoding: [0xf0,0x00,0xcd,0xe1] + |