summaryrefslogtreecommitdiff
path: root/test/MC/ARM/directive-arch-armv4.s
diff options
context:
space:
mode:
authorSaleem Abdulrasool <compnerd@compnerd.org>2014-02-08 23:17:02 +0000
committerSaleem Abdulrasool <compnerd@compnerd.org>2014-02-08 23:17:02 +0000
commit91ec991b45cd16b73e3394ee2479592d716d68bd (patch)
treee6589f4ba771b4a971ce2b4985638c2606999d4a /test/MC/ARM/directive-arch-armv4.s
parent846acbeef17fd6df7f389c034ada5c490d006d76 (diff)
downloadllvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.gz
llvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.bz2
llvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.xz
ARM: change attribute tests to use parsed form
This makes the tests more readable by using the -arm-attributes decoding support in llvm-readobj since that is now available. Change the invocation commands to be similar to other test and use a more precise triple (the tests only require ARM EABI support). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201029 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM/directive-arch-armv4.s')
-rw-r--r--test/MC/ARM/directive-arch-armv4.s39
1 files changed, 19 insertions, 20 deletions
diff --git a/test/MC/ARM/directive-arch-armv4.s b/test/MC/ARM/directive-arch-armv4.s
index c84a84b6e1..fb83842840 100644
--- a/test/MC/ARM/directive-arch-armv4.s
+++ b/test/MC/ARM/directive-arch-armv4.s
@@ -3,32 +3,30 @@
@ This test case will check the default .ARM.attributes value for the
@ armv4 architecture.
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \
-@ RUN: | FileCheck %s --check-prefix=CHECK-ASM
-@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \
-@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ
+@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \
+@ RUN: | FileCheck %s -check-prefix CHECK-ASM
+@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \
+@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR
.syntax unified
.arch armv4
@ CHECK-ASM: .arch armv4
-@ CHECK-OBJ: Name: .ARM.attributes
-@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003)
-@ CHECK-OBJ: Flags [ (0x0)
-@ CHECK-OBJ: ]
-@ CHECK-OBJ: Address: 0x0
-@ CHECK-OBJ: Offset: 0x{{[0-9A-F]*}}
-@ CHECK-OBJ: Size: 23
-@ CHECK-OBJ: Link: 0
-@ CHECK-OBJ: Info: 0
-@ CHECK-OBJ: AddressAlignment: 1
-@ CHECK-OBJ: EntrySize: 0
-@ CHECK-OBJ: SectionData (
-@ CHECK-OBJ: 0000: 41160000 00616561 62690001 0C000000 |A....aeabi......|
-@ CHECK-OBJ: 0010: 05340006 010801 |.4.....|
-@ CHECK-OBJ: )
-
+@ CHECK-ATTR: FileAttributes {
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_name
+@ CHECK-ATTR: Value: 4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: CPU_arch
+@ CHECK-ATTR: Description: ARM v4
+@ CHECK-ATTR: }
+@ CHECK-ATTR: Attribute {
+@ CHECK-ATTR: TagName: ARM_ISA_use
+@ CHECK-ATTR: Description: Permitted
+@ CHECK-ATTR: }
+@ CHECK-ATTR: }
@ Check that multiplication is supported
mul r4, r5, r6
@@ -37,3 +35,4 @@
umull r4, r5, r6, r3
smlal r4, r5, r6, r3
umlal r4, r5, r6, r3
+