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| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-02-08 23:17:02 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-02-08 23:17:02 +0000 |
| commit | 91ec991b45cd16b73e3394ee2479592d716d68bd (patch) | |
| tree | e6589f4ba771b4a971ce2b4985638c2606999d4a /test/MC/ARM/directive-arch-armv7-r.s | |
| parent | 846acbeef17fd6df7f389c034ada5c490d006d76 (diff) | |
| download | llvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.gz llvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.bz2 llvm-91ec991b45cd16b73e3394ee2479592d716d68bd.tar.xz | |
ARM: change attribute tests to use parsed form
This makes the tests more readable by using the -arm-attributes decoding support
in llvm-readobj since that is now available. Change the invocation commands to
be similar to other test and use a more precise triple (the tests only require
ARM EABI support).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201029 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/ARM/directive-arch-armv7-r.s')
| -rw-r--r-- | test/MC/ARM/directive-arch-armv7-r.s | 46 |
1 files changed, 27 insertions, 19 deletions
diff --git a/test/MC/ARM/directive-arch-armv7-r.s b/test/MC/ARM/directive-arch-armv7-r.s index 2aa702c906..99481f70c5 100644 --- a/test/MC/ARM/directive-arch-armv7-r.s +++ b/test/MC/ARM/directive-arch-armv7-r.s @@ -3,28 +3,36 @@ @ This test case will check the default .ARM.attributes value for the @ armv7-r architecture. -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=asm \ -@ RUN: | FileCheck %s --check-prefix=CHECK-ASM -@ RUN: llvm-mc < %s -triple=arm-linux-gnueabi -filetype=obj \ -@ RUN: | llvm-readobj -s -sd | FileCheck %s --check-prefix=CHECK-OBJ +@ RUN: llvm-mc -triple arm-eabi -filetype asm %s \ +@ RUN: | FileCheck %s -check-prefix CHECK-ASM +@ RUN: llvm-mc -triple arm-eabi -filetype obj %s \ +@ RUN: | llvm-readobj -arm-attributes | FileCheck %s -check-prefix CHECK-ATTR .syntax unified .arch armv7-r @ CHECK-ASM: .arch armv7-r -@ CHECK-OBJ: Name: .ARM.attributes -@ CHECK-OBJ: Type: SHT_ARM_ATTRIBUTES (0x70000003) -@ CHECK-OBJ: Flags [ (0x0) -@ CHECK-OBJ: ] -@ CHECK-OBJ: Address: 0x0 -@ CHECK-OBJ: Offset: 0x34 -@ CHECK-OBJ: Size: 29 -@ CHECK-OBJ: Link: 0 -@ CHECK-OBJ: Info: 0 -@ CHECK-OBJ: AddressAlignment: 1 -@ CHECK-OBJ: EntrySize: 0 -@ CHECK-OBJ: SectionData ( -@ CHECK-OBJ: 0000: 411C0000 00616561 62690001 12000000 |A....aeabi......| -@ CHECK-OBJ: 0010: 05372D52 00060A07 52080109 02 |.7-R....R....| -@ CHECK-OBJ: ) +@ CHECK-ATTR: FileAttributes { +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_name +@ CHECK-ATTR: Value: 7-R +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch +@ CHECK-ATTR: Description: ARM v7 +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: CPU_arch_profile +@ CHECK-ATTR: Description: Real-time +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: ARM_ISA_use +@ CHECK-ATTR: Description: Permitted +@ CHECK-ATTR: } +@ CHECK-ATTR: Attribute { +@ CHECK-ATTR: TagName: THUMB_ISA_use +@ CHECK-ATTR: Description: Thumb-2 +@ CHECK-ATTR: } +@ CHECK-ATTR: } + |