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| author | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-06-18 17:10:30 +0000 |
|---|---|---|
| committer | Matheus Almeida <matheus.almeida@imgtec.com> | 2014-06-18 17:10:30 +0000 |
| commit | 95f1fa7ec339f1dc27e279a2241420c4db850f5b (patch) | |
| tree | d1fb701db003b91bfc22a058afdfae8324bb3c4a /test/MC/Mips/mips2/invalid-mips32.s | |
| parent | a841620f66f2e5673a0a0529f655dcb742031e6b (diff) | |
| download | llvm-95f1fa7ec339f1dc27e279a2241420c4db850f5b.tar.gz llvm-95f1fa7ec339f1dc27e279a2241420c4db850f5b.tar.bz2 llvm-95f1fa7ec339f1dc27e279a2241420c4db850f5b.tar.xz | |
[mips] SYNC $stype instruction was added in Mips32
but SYNC with an implied operand ($stype = 0) is valid since Mips2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211185 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/MC/Mips/mips2/invalid-mips32.s')
| -rw-r--r-- | test/MC/Mips/mips2/invalid-mips32.s | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/test/MC/Mips/mips2/invalid-mips32.s b/test/MC/Mips/mips2/invalid-mips32.s index 653d2a1311..43ea345441 100644 --- a/test/MC/Mips/mips2/invalid-mips32.s +++ b/test/MC/Mips/mips2/invalid-mips32.s @@ -40,3 +40,5 @@ msubu $15,$a1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mtc0 $9,$29,3 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled mul $s0,$s4,$at # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + sync 0 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + sync 1 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled |