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| author | Eric Christopher <echristo@gmail.com> | 2013-11-04 21:41:21 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@gmail.com> | 2013-11-04 21:41:21 +0000 |
| commit | 3faf43fc66fd162e722e81d5bba334c1debc97d2 (patch) | |
| tree | 958c271d999b70fc6fdcc1be9168b67f00f77496 /test | |
| parent | 63d8f88686e9bde3b6ee94f24c2ab1d4e1df3e4a (diff) | |
| download | llvm-3faf43fc66fd162e722e81d5bba334c1debc97d2.tar.gz llvm-3faf43fc66fd162e722e81d5bba334c1debc97d2.tar.bz2 llvm-3faf43fc66fd162e722e81d5bba334c1debc97d2.tar.xz | |
Check for both styles of clobbers, those produced by dragonegg and
those produced by clang for the inline asm bswap conversion.
Modified from a patch by Chris Smowton.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194016 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test')
| -rw-r--r-- | test/CodeGen/X86/inline-asm-flag-clobber.ll | 31 |
1 files changed, 22 insertions, 9 deletions
diff --git a/test/CodeGen/X86/inline-asm-flag-clobber.ll b/test/CodeGen/X86/inline-asm-flag-clobber.ll index 51ea843712..45f4d2f38a 100644 --- a/test/CodeGen/X86/inline-asm-flag-clobber.ll +++ b/test/CodeGen/X86/inline-asm-flag-clobber.ll @@ -2,18 +2,31 @@ ; PR3701 define i64 @t(i64* %arg) nounwind { - br i1 true, label %1, label %5 + br i1 true, label %1, label %5 -; <label>:1 ; preds = %0 - %2 = icmp eq i64* null, %arg ; <i1> [#uses=1] - %3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%struct.thread*> [#uses=0] +; <label>:1 ; preds = %0 + %2 = icmp eq i64* null, %arg ; <i1> [#uses=1] + %3 = tail call i64* asm sideeffect "movl %fs:0,$0", "=r,~{dirflag},~{fpsr},~{flags}"() nounwind ; <%struct.thread*> [#uses=0] ; CHECK: test ; CHECK-NEXT: j - br i1 %2, label %4, label %5 + br i1 %2, label %4, label %5 -; <label>:4 ; preds = %1 - ret i64 1 +; <label>:4 ; preds = %1 + ret i64 1 -; <label>:5 ; preds = %1 - ret i64 0 +; <label>:5 ; preds = %1 + ret i64 0 } + +; Make sure that we translate this to the bswap intrinsic which lowers down without the +; inline assembly. +; CHECK-NOT: #APP +define i32 @s(i32 %argc, i8** nocapture %argv) unnamed_addr nounwind { +entry: + %0 = trunc i32 %argc to i16 + %asmtmp = tail call i16 asm "rorw $$8, ${0:w}", "=r,0,~{fpsr},~{flags},~{cc}"(i16 %0) nounwind, !srcloc !0 + %1 = zext i16 %asmtmp to i32 + ret i32 %1 +} + +!0 = metadata !{i64 935930} |