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| author | Evan Cheng <evan.cheng@apple.com> | 2006-05-16 07:05:30 +0000 |
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-05-16 07:05:30 +0000 |
| commit | 44a65fa552ed61cf9dba8f68f59b05e5137e6b01 (patch) | |
| tree | 812e2da89f37bf70a866f40797a46619d649929c /utils/TableGen/CodeGenTarget.h | |
| parent | c14c936c79c60c9857d1b864cda029eded2a5d10 (diff) | |
| download | llvm-44a65fa552ed61cf9dba8f68f59b05e5137e6b01.tar.gz llvm-44a65fa552ed61cf9dba8f68f59b05e5137e6b01.tar.bz2 llvm-44a65fa552ed61cf9dba8f68f59b05e5137e6b01.tar.xz | |
Allow patterns to refer to physical registers that belong to multiple
register classes.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28323 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils/TableGen/CodeGenTarget.h')
| -rw-r--r-- | utils/TableGen/CodeGenTarget.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenTarget.h b/utils/TableGen/CodeGenTarget.h index bedf1bb736..5ed266ff81 100644 --- a/utils/TableGen/CodeGenTarget.h +++ b/utils/TableGen/CodeGenTarget.h @@ -110,6 +110,10 @@ public: } return FoundRC; } + + /// getRegisterVTs - Find the union of all possible ValueTypes for the + /// specified physical register. + std::vector<unsigned char> getRegisterVTs(Record *R) const; const std::vector<MVT::ValueType> &getLegalValueTypes() const { if (LegalValueTypes.empty()) ReadLegalValueTypes(); |