summaryrefslogtreecommitdiff
path: root/include/llvm/IR
diff options
context:
space:
mode:
Diffstat (limited to 'include/llvm/IR')
-rw-r--r--include/llvm/IR/IntrinsicsARM64.td7
1 files changed, 5 insertions, 2 deletions
diff --git a/include/llvm/IR/IntrinsicsARM64.td b/include/llvm/IR/IntrinsicsARM64.td
index 56f1b1de3d..b280d005d0 100644
--- a/include/llvm/IR/IntrinsicsARM64.td
+++ b/include/llvm/IR/IntrinsicsARM64.td
@@ -268,6 +268,9 @@ let Properties = [IntrNoMem] in {
def int_arm64_neon_frecps : AdvSIMD_2FloatArg_Intrinsic;
def int_arm64_neon_frsqrts : AdvSIMD_2FloatArg_Intrinsic;
+ // Reciprocal Exponent
+ def int_arm64_neon_frecpx : AdvSIMD_1FloatArg_Intrinsic;
+
// Vector Saturating Shift Left
def int_arm64_neon_sqshl : AdvSIMD_2IntArg_Intrinsic;
def int_arm64_neon_uqshl : AdvSIMD_2IntArg_Intrinsic;
@@ -339,11 +342,11 @@ let Properties = [IntrNoMem] in {
// Vector Reciprocal Estimate
def int_arm64_neon_urecpe : AdvSIMD_1VectorArg_Intrinsic;
- def int_arm64_neon_frecpe : AdvSIMD_1VectorArg_Intrinsic;
+ def int_arm64_neon_frecpe : AdvSIMD_1FloatArg_Intrinsic;
// Vector Square Root Estimate
def int_arm64_neon_ursqrte : AdvSIMD_1VectorArg_Intrinsic;
- def int_arm64_neon_frsqrte : AdvSIMD_1VectorArg_Intrinsic;
+ def int_arm64_neon_frsqrte : AdvSIMD_1FloatArg_Intrinsic;
// Vector Bitwise Reverse
def int_arm64_neon_rbit : AdvSIMD_1VectorArg_Intrinsic;