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path: root/lib/CodeGen/MachineCSE.cpp
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* Add bundle aware API for querying instruction properties and switch the codeEvan Cheng2011-12-07
| | | | | | | | | | | | | | | generator to it. For non-bundle instructions, these behave exactly the same as the MC layer API. For properties like mayLoad / mayStore, look into the bundle and if any of the bundled instructions has the property it would return true. For properties like isPredicable, only return true if *all* of the bundled instructions have the property. For properties like canFoldAsLoad, isCompare, conservatively return false for bundles. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146026 91177308-0d34-0410-b5e6-96231b3b80d8
* We need to verify that the machine instruction we're using as a replacement forBill Wendling2011-10-12
| | | | | | | | | | | our current machine instruction defines a register with the same register class as what's being replaced. This showed up in the SPEC 403.gcc benchmark, where it would ICE because a tail call was expecting one register class but was given another. (The machine instruction verifier catches this situation.) <rdar://problem/10270968> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141830 91177308-0d34-0410-b5e6-96231b3b80d8
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-28
| | | | | | | | | sink them into MC layer. - Added MCInstrInfo, which captures the tablegen generated static data. Chang TargetInstrInfo so it's based off MCInstrInfo. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134021 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-revert r130877; it's apparently causing a regression on 197.parser,Eli Friedman2011-05-06
| | | | | | | | possibly related to cbnz formation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130977 91177308-0d34-0410-b5e6-96231b3b80d8
* Minor correction to r130877; fixes PR9846 and hopefully the buildbot failures.Eli Friedman2011-05-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130925 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-commit r130862 with a minor change to avoid an iterator running off the ↵Eli Friedman2011-05-04
| | | | | | | | | | | | edge in some cases. Original message: Teach MachineCSE how to do simple cross-block CSE involving physregs. This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130877 91177308-0d34-0410-b5e6-96231b3b80d8
* Back out r130862; it appears to be breaking bootstrap.Eli Friedman2011-05-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130867 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach MachineCSE how to do simple cross-block CSE involving physregs. This ↵Eli Friedman2011-05-04
| | | | | | allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 . git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130862 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a couple of places where changes are made but not tracked.Evan Cheng2011-04-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129287 91177308-0d34-0410-b5e6-96231b3b80d8
* fit in 80 cols and use MBB::isSuccessor instead of a handChris Lattner2011-01-10
| | | | | | | | rolled std::find. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123164 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify a bunch of isVirtualRegister() and isPhysicalRegister() logic.Jakob Stoklund Olesen2011-01-10
| | | | | | | | These functions not longer assert when passed 0, but simply return false instead. No functional change intended. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123155 91177308-0d34-0410-b5e6-96231b3b80d8
* Do not model all INLINEASM instructions as having unmodelled side effects.Evan Cheng2011-01-07
| | | | | | | | | | | Instead encode llvm IR level property "HasSideEffects" in an operand (shared with IsAlignStack). Added MachineInstrs::hasUnmodeledSideEffects() to check the operand when the instruction is an INLINEASM. This allows memory instructions to be moved around INLINEASM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123044 91177308-0d34-0410-b5e6-96231b3b80d8
* Use a RecyclingAllocator to allocate values for MachineCSE's ScopedHashTable forCameron Zwarich2011-01-03
| | | | | | | a 28% speedup of MachineCSE time on 403.gcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122735 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach machine cse to commute instructions.Evan Cheng2010-12-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121903 91177308-0d34-0410-b5e6-96231b3b80d8
* Teach machine cse to eliminate instructions with multiple physreg uses and ↵Evan Cheng2010-10-29
| | | | | | defs. rdar://8610857. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117745 91177308-0d34-0410-b5e6-96231b3b80d8
* Get rid of static constructors for pass registration. Instead, every pass ↵Owen Anderson2010-10-19
| | | | | | | | | | | | | | | | | | exposes an initializeMyPassFunction(), which must be called in the pass's constructor. This function uses static dependency declarations to recursively initialize the pass's dependencies. Clients that only create passes through the createFooPass() APIs will require no changes. Clients that want to use the CommandLine options for passes will need to manually call the appropriate initialization functions in PassInitialization.h before parsing commandline arguments. I have tested this with all standard configurations of clang and llvm-gcc on Darwin. It is possible that there are problems with the static dependencies that will only be visible with non-standard options. If you encounter any crash in pass registration/creation, please send the testcase to me directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116820 91177308-0d34-0410-b5e6-96231b3b80d8
* Begin adding static dependence information to passes, which will allow us toOwen Anderson2010-10-12
| | | | | | | | | | perform initialization without static constructors AND without explicit initialization by the client. For the moment, passes are required to initialize both their (potential) dependencies and any passes they preserve. I hope to be able to relax the latter requirement in the future. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116334 91177308-0d34-0410-b5e6-96231b3b80d8
* Now with fewer extraneous semicolons!Owen Anderson2010-10-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115996 91177308-0d34-0410-b5e6-96231b3b80d8
* Add MachineRegisterInfo::constrainRegClass and use it in MachineCSE.Jakob Stoklund Olesen2010-10-06
| | | | | | | | This function is intended to be used when inserting a machine instruction that trivially restricts the legal registers, like LEA requiring a GR32_NOSP argument. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115875 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine CSE was forgetting to clear some data structures.Evan Cheng2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114222 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix a potential bug that can cause miscomparison with and without debug info.Evan Cheng2010-09-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@114220 91177308-0d34-0410-b5e6-96231b3b80d8
* Machine CSE preserves CFG. Pass manager was freeing machineloopinfo after ↵Evan Cheng2010-08-17
| | | | | | machine cse before. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@111281 91177308-0d34-0410-b5e6-96231b3b80d8
* Reapply r110396, with fixes to appease the Linux buildbot gods.Owen Anderson2010-08-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110460 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert r110396 to fix buildbots.Owen Anderson2010-08-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110410 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't use PassInfo* as a type identifier for passes. Instead, use the ↵Owen Anderson2010-08-05
| | | | | | | | | address of the static ID member as the sole unique type identifier. Clean up APIs related to this change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@110396 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix batch of converting RegisterPass<> to INTIALIZE_PASS().Owen Anderson2010-07-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109045 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.Jakob Stoklund Olesen2010-07-16
| | | | | | TII::isMoveInstr is going tobe completely removed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@108507 91177308-0d34-0410-b5e6-96231b3b80d8
* Convert EXTRACT_SUBREG to COPY when emitting machine instrs.Jakob Stoklund Olesen2010-07-08
| | | | | | | | | EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead. Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg(). The isMoveInstr hook will be removed later. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107879 91177308-0d34-0410-b5e6-96231b3b80d8
* Detect and handle COPY in many places.Jakob Stoklund Olesen2010-07-03
| | | | | | | This code is transitional, it will soon be possible to eliminate isExtractSubreg, isInsertSubreg, and isMoveInstr in most places. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107547 91177308-0d34-0410-b5e6-96231b3b80d8
* Re-apply 105308 with fix.Evan Cheng2010-06-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105502 91177308-0d34-0410-b5e6-96231b3b80d8
* Revert 105308.Bob Wilson2010-06-03
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105399 91177308-0d34-0410-b5e6-96231b3b80d8
* Enable machine cse of instructions which define physical registers.Evan Cheng2010-06-02
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@105308 91177308-0d34-0410-b5e6-96231b3b80d8
* Make this LookAheadLimit, not the uninitialized LookAheadLeft.Eric Christopher2010-05-21
| | | | | | | Evan please verify! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104408 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow machine cse to cse instructions which define physical registers. ↵Evan Cheng2010-05-21
| | | | | | Controlled by option -machine-cse-phys-defs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104385 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a utility function for conservatively clearing kill flags, and makeDan Gohman2010-05-13
| | | | | | | use of it in MachineCSE. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103726 91177308-0d34-0410-b5e6-96231b3b80d8
* Rewrite machine cse to avoid recursion.Evan Cheng2010-04-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101964 91177308-0d34-0410-b5e6-96231b3b80d8
* Typo.Evan Cheng2010-04-20
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101914 91177308-0d34-0410-b5e6-96231b3b80d8
* After trivial coalescing, the MI being visited may have become a copy. Avoid ↵Evan Cheng2010-04-02
| | | | | | | | | adding it to CSE hash table since copies aren't being considered for CSE and they may be deleted. rdar://7819990 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100170 91177308-0d34-0410-b5e6-96231b3b80d8
* dbg_value may end a block.Evan Cheng2010-03-24
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99378 91177308-0d34-0410-b5e6-96231b3b80d8
* Code clean up.Evan Cheng2010-03-23
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@99319 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix debug_value handling.Dale Johannesen2010-03-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98224 91177308-0d34-0410-b5e6-96231b3b80d8
* Add a couple more heuristics to neuter machine cse some more.Evan Cheng2010-03-10
| | | | | | | | | | | | 1. Be careful with cse "cheap" expressions. e.g. constant materialization. Only cse them when the common expression is local or in a direct predecessor. We don't want cse of cheap instruction causing other expressions to be spilled. 2. Watch out for the case where the expression doesn't itself uses a virtual register. e.g. lea of frame object. If the common expression itself is used by copies (common for passing addresses to function calls), don't perform the cse. Since these expressions do not use a register, it creates a live range but doesn't close any, we want to be very careful with increasing register pressure. Note these are heuristics so machine cse doesn't make register allocator unhappy. Once we have proper live range splitting and re-materialization support in place, these should be evaluated again. Now machine cse is almost always a win on llvm nightly tests on x86 and x86_64. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98121 91177308-0d34-0410-b5e6-96231b3b80d8
* Allow more cross-rc coalescing.Evan Cheng2010-03-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98048 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't do illegal cross-class coalescing.Jakob Stoklund Olesen2010-03-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98044 91177308-0d34-0410-b5e6-96231b3b80d8
* - Make the machine cse dumb coalescer (as opposed to the more awesome simpleEvan Cheng2010-03-09
| | | | | | | | | | coalescer) handle sub-register classes. - Add heuristics to avoid non-profitable cse. Given the current lack of live range splitting, avoid cse when an expression has PHI use and the would be new use is in a BB where the expression wasn't already being used. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98043 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't waste time trying to CSE labels, phis, inline asm. Definitely avoid ↵Evan Cheng2010-03-08
| | | | | | cse implicit-def for obvious performance reason. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98009 91177308-0d34-0410-b5e6-96231b3b80d8
* Restrict machine cse to really trivial coalescing. Leave the heavy lifting ↵Evan Cheng2010-03-08
| | | | | | to a real coalescer. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98007 91177308-0d34-0410-b5e6-96231b3b80d8
* Don't update physical register def.Evan Cheng2010-03-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97861 91177308-0d34-0410-b5e6-96231b3b80d8
* Avoid cse load instructions unless they are known to be invariant loads.Evan Cheng2010-03-04
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97747 91177308-0d34-0410-b5e6-96231b3b80d8
* Look ahead a bit to determine if a physical register def that is not marked ↵Evan Cheng2010-03-04
| | | | | | dead is really alive. This is necessary to catch a lot of common cse opportunities for targets like x86. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@97706 91177308-0d34-0410-b5e6-96231b3b80d8
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