summaryrefslogtreecommitdiff
path: root/lib/Target/ARM/ARMInstrThumb.td
Commit message (Expand)AuthorAge
...
* Thumb assembly parsing and encoding for LSL(immediate).Jim Grosbach2011-08-19
* Thumb assembly parsing and encoding for LDRSB and LDRSH.Jim Grosbach2011-08-19
* Thumb assembly parsing and encoding for LDRH.Jim Grosbach2011-08-19
* Thumb assembly parsing and encoding for LDRB.Jim Grosbach2011-08-19
* Thumb assembly parsing and encoding for LDR(immediate) form T2.Jim Grosbach2011-08-19
* Thumb assembly parsing and encoding for LDR(immediate) form T1.Jim Grosbach2011-08-19
* Add explanatory comment.Jim Grosbach2011-08-19
* Thumb assembly parsing and encoding for LDM instruction.Jim Grosbach2011-08-18
* Thumb assembly parsing and encoding for CMP.Jim Grosbach2011-08-18
* Thumb instructions CBZ and CBNZ are Thumb2, not THumb1.Jim Grosbach2011-08-18
* 80 columns.Jim Grosbach2011-08-18
* Clean up patterns for Thumb1 system instructions.Jim Grosbach2011-08-17
* ARM clean up the imm_sr operand class representation.Jim Grosbach2011-08-17
* Thumb assembly parsing and encoding for ADR.Jim Grosbach2011-08-17
* Thumb ADD(immediate) parsing support.Jim Grosbach2011-08-16
* Fix decoding LDRSB and LDRSH in Thumb1 mode. Patch by James Molloy.Owen Anderson2011-08-15
* Replace the existing ARM disassembler with a new one based on the FixedLenDec...Owen Anderson2011-08-09
* Thumb1 BL instructions encoding 22 bits of displacement, not 21.Owen Anderson2011-08-08
* Fix encodings for Thumb ASR and LSR immediate operands. They encode the rang...Owen Anderson2011-08-08
* ARM refactoring assembly parsing of memory address operands.Jim Grosbach2011-08-03
* Fix broken encoding of tCBNZ.Owen Anderson2011-08-03
* Move imm0_255 to ARMInstrInfo.td with the other immediate predicates.Jim Grosbach2011-08-01
* ARM parsing and encoding for SVC instruction.Jim Grosbach2011-07-26
* Thumb assembly support for SETEND instruction.Jim Grosbach2011-07-22
* Revamp our handling of tLDMIA[_UPD] and tSTMIA[_UPD] to avoid having multiple...Owen Anderson2011-07-18
* Mark the Darwin assembler workout as isCodeGenOnly, so that it doesn't cause ...Owen Anderson2011-07-18
* Re-apply r135319 with a fix for the constant island pass.Owen Anderson2011-07-18
* Revert r135319 in an attempt to get to unbreak testers.Owen Anderson2011-07-16
* Get rid of the separate opcodes for the Darwin versions of tBL, tBLXi, and tB...Owen Anderson2011-07-15
* Add OperandTypes for Thumb branch targets.Benjamin Kramer2011-07-14
* Add a target-indepedent entry to MCInstrDesc to describe the encoded size of ...Owen Anderson2011-07-13
* Range checking for CDP[2] immediates.Jim Grosbach2011-07-13
* Fix predicates for Thumb co-processor instructions.Jim Grosbach2011-07-13
* Mark tBRIND as predicable.Jim Grosbach2011-07-08
* Pseudo-ize tBRIND.Jim Grosbach2011-07-08
* Make tBX_RET and tBX_RET_vararg predicable.Jim Grosbach2011-07-08
* Pseudo-ize tBX_RET and tBX_RET_vararg.Jim Grosbach2011-07-08
* Shuffle productions around a bit.Jim Grosbach2011-07-08
* Use tPseudoExpand for tTAILJMPrND and tTAILJMPr.Jim Grosbach2011-07-08
* Use tPseudoExpand for tTAILJMPd and tTAILJMPdND.Jim Grosbach2011-07-08
* Move Thumb tail call pseudos to Thumb.td file.Jim Grosbach2011-07-08
* Use TableGen'erated pseudo lowering for ARM.Jim Grosbach2011-07-08
* Pseudo-ize t2MOVCC[ri].Jim Grosbach2011-07-01
* Refact ARM Thumb1 tMOVr instruction family.Jim Grosbach2011-06-30
* Thumb1 register to register MOV instruction is predicable.Jim Grosbach2011-06-30
* Pseudo-ize the Thumb tTPsoft instruction.Jim Grosbach2011-06-30
* Pseudo-ize the Thumb tPOP_RET instruction.Jim Grosbach2011-06-30
* Refactor away tSpill and tRestore pseudos in ARM backend.Jim Grosbach2011-06-29
* ARM Assembly support for Thumb mov-immediate.Jim Grosbach2011-06-27
* Teach dag combine to match halfword byteswap patterns.Evan Cheng2011-06-21
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-23 04:27:52 +0000