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path: root/lib/Target/ARM/Disassembler
Commit message (Expand)AuthorAge
* ARM: fix B decodingAmaury de la Vieuville2013-06-13
* ARM: Enforce decoding rules for VLDn instructionsAmaury de la Vieuville2013-06-11
* ARM: Fix STREX/LDREX reecodingAmaury de la Vieuville2013-06-11
* ARM: ISB cannot be passed the same options as DMBAmaury de la Vieuville2013-06-10
* ARM: fix VMOVvnf32 decoding when ambiguous with VCVTAmaury de la Vieuville2013-06-08
* ARM: enforce SRS decoding constraintsAmaury de la Vieuville2013-06-08
* ARM: fix CPS decoding when ambiguous with QADDAmaury de la Vieuville2013-06-08
* ARM: fix VCVT decodingAmaury de la Vieuville2013-06-08
* ARM: add fstmx and fldmx instructions for assemblyTim Northover2013-05-31
* Replace Count{Leading,Trailing}Zeros_{32,64} with count{Leading,Trailing}Zeros.Michael J. Spencer2013-05-24
* Remove the Copied parameter from MemoryObject::readBytes.Benjamin Kramer2013-05-24
* Add MCSymbolizer for symbolic/annotated disassembly.Ahmed Bougacha2013-05-24
* VSTn instructions have a number of encoding constraints which are not impleme...Mihai Popa2013-05-20
* Q registers are encoded in fields of the same length as D registers. As Q reg...Mihai Popa2013-05-20
* Replace some bit operations with simpler ones. No functionality change.Benjamin Kramer2013-05-19
* The purpose of the patch is to fix the syntax of ARM mrc and mrc2 instruction...Mihai Popa2013-05-13
* ARM: Fix encoding of hint instruction for Thumb.Quentin Colombet2013-04-26
* ARM: Permit "sp" in ARM variant of STREXD instructionsTim Northover2013-04-19
* ARM: permit "sp" in ARM variants of MOVW/MOVT instructionsTim Northover2013-04-19
* Fix treatment of ARM unallocated hint instructions.Quentin Colombet2013-04-17
* Fix issue with disassembler decoding CBZ/CBNZ immediates as negatives when th...Gordon Keiser2013-03-28
* Patch by Gordon Keiser!Joe Abbey2013-03-26
* Remove edis - the enhanced disassembler. Fixes PR14654.Roman Divacky2012-12-19
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-03
* Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInstKevin Enderby2012-11-29
* Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby2012-10-29
* Fix a bug where a 32-bit address with the high bit does not get symbolicatedKevin Enderby2012-10-18
* Fix the handling of edge cases in ARM shifted operands.Tim Northover2012-09-22
* Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover2012-09-06
* Check for invalid alignment values when decoding VLDn/VSTn (single ln) instru...Tim Northover2012-09-06
* Fix integer undefined behavior due to signed left shift overflow in LLVM.Richard Smith2012-08-24
* Remove unnecessary include of ARMGenInstrInfo.inc.Craig Topper2012-08-17
* Switch the fixed-length disassembler to be table-driven.Jim Grosbach2012-08-14
* Fix #13035, a bug around Thumb instruction LDRD/STRD with negative #0 offset ...Jiangning Liu2012-08-02
* Fix #13138, a bug around ARM instruction DSB encoding and decoding issue.Jiangning Liu2012-08-02
* Fix a typo (the the => the)Sylvestre Ledru2012-07-23
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-10
* Revert r159938 (and r159945) to appease the buildbots.Chad Rosier2012-07-09
* Oops - correct broken disassembly for VMOVRichard Barton2012-07-09
* Fix instruction description of VMOV (between two ARM core registers and two s...Richard Barton2012-07-09
* Correct decoder for T1 conditional B encodingRichard Barton2012-06-06
* ARMDisassembler.cpp: Fix utf8 char in comments.NAKAMURA Takumi2012-05-22
* Tweak to the fix in r156212, as with the change in removing the shift theKevin Enderby2012-05-04
* Fix a bug in the ARM disassembler for wide branch conditional instructionsKevin Enderby2012-05-04
* Fix issues with the ARM bl and blx thumb instructions and the J1 and J2 bitsKevin Enderby2012-05-03
* Fixed disassembler for vstm/vldm ARM VFP instructions.Silviu Baranga2012-05-03
* ARM: Tweak tADDrSP definition for consistent operand order.Jim Grosbach2012-04-27
* Refactor IT handling not to store the bottom bit of the condition code in the...Richard Barton2012-04-27
* Refactor Thumb ITState handling in ARM Disassembler to more efficiently use i...Richard Barton2012-04-24
* Added support for disassembling unpredictable swp/swpb ARM instructions.Silviu Baranga2012-04-18
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