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path: root/lib/Target/ARM64/ARM64InstrFormats.td
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* Fix some doc and comment typosAlp Toker2014-04-09
* [ARM64] Change SYS without a register to an alias to make disassembling more ...Bradley Smith2014-04-09
* [ARM64] Properly support both apple and standard syntax for FMOVBradley Smith2014-04-09
* [ARM64] When printing a pre-indexed address with #0, the ', #0' is not optional.Bradley Smith2014-04-09
* [ARM64] Fixup ADR/ADRP parsing such that they accept immediates and all label...Bradley Smith2014-04-09
* [ARM64] Add a PostEncoderMethod to FCMP - the Rm field should canonically be ...Bradley Smith2014-04-09
* [ARM64] SCVTF and FCVTZS/U are undefined if scale<5> == 0.Bradley Smith2014-04-09
* [ARM64] EXT and EXTR instructions on v8i8 and W regs respectively must have t...Bradley Smith2014-04-09
* [ARM64] Scaled fixed-point FCVTZSs should also have bit 29 set to zero.Bradley Smith2014-04-09
* [ARM64] UBFM/BFM is undefined on w registers when imms<5> or immr<5> is 1.Bradley Smith2014-04-09
* [ARM64] Floating point to fixed point scaled conversions are only available o...Bradley Smith2014-04-09
* [ARM64] Port over the PostEncoderMethod fix for SMULH/UMULH from AArch64.Bradley Smith2014-04-09
* [ARM64] Rework system register parsing to overcome SPSel clash in MSR variants.Bradley Smith2014-04-09
* [ARM64] Port over the PostEncoderMethod from AArch64 for exclusive loads and ...Bradley Smith2014-04-09
* [ARM64] Switch the decoder, disassembler, instprinter and asmparser over to u...Bradley Smith2014-04-09
* [ARM64] Add missing 1Q -> 1q vector kind aliasBradley Smith2014-04-09
* ARM64: always use i64 for the RHS of shift operationsTim Northover2014-04-03
* ARM64: add patterns for more lane-wise ld1/st1 operations.Tim Northover2014-04-01
* ARM64: add extra patterns for scalar shiftsTim Northover2014-03-31
* ARM64: add more scalar patterns for usqadd & suqadd.Tim Northover2014-03-31
* ARM64: add i64 scalar pattern for @llvm.arm64.absTim Northover2014-03-31
* ARM64: initial backend importTim Northover2014-03-29