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path: root/lib/Target/Hexagon/HexagonISelLowering.cpp
Commit message (Expand)AuthorAge
* Remove unnecessary #includes.Bill Wendling2014-01-06
* Refactor function that checks that __builtin_returnaddress's argument is cons...Bill Wendling2014-01-06
* Emit an error message if the value passed to __builtin_returnaddress isn't a ...Bill Wendling2014-01-05
* Hexagon: Remove global state.Benjamin Kramer2013-10-27
* Fix unused variables.Eli Friedman2013-09-10
* Refactor isInTailCallPosition handlingTim Northover2013-08-06
* Use SmallVectorImpl& instead of SmallVector to avoid repeating small vector s...Craig Topper2013-07-14
* Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.Jakob Stoklund Olesen2013-07-04
* Revert r185595-185596 which broke buildbots.Jakob Stoklund Olesen2013-07-04
* Remove the EXCEPTIONADDR, EHSELECTION, and LSDAADDR ISD opcodes.Jakob Stoklund Olesen2013-07-03
* The getRegForInlineAsmConstraint function should only accept MVT value types.Chad Rosier2013-06-22
* Order CALLSEQ_START and CALLSEQ_END nodes.Andrew Trick2013-05-29
* Track IR ordering of SelectionDAG nodes 2/4.Andrew Trick2013-05-25
* Hexagon: SelectionDAG should not use MVT::Other to check the legality of BR_CC.Jyotsna Verma2013-05-21
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-07
* Reverting r181331.Jyotsna Verma2013-05-07
* Hexagon: Fix Small Data support to handle -G 0 correctly.Jyotsna Verma2013-05-07
* Hexagon: Use multiclass for Jump instructions.Jyotsna Verma2013-05-01
* Remove unused MEMBARRIER DAG node; it's been replaced by ATOMIC_FENCE.Tim Northover2013-04-20
* Hexagon: Expand br_cc.Jyotsna Verma2013-04-04
* DAGCombiner: Use correct value type for checking legality of BR_CC v3Tom Stellard2013-03-08
* Hexagon: Handle i8, i16 and i1 Var Args.Jyotsna Verma2013-03-07
* Hexagon: Add support to lower block address.Jyotsna Verma2013-03-07
* reverting patch 176508.Jyotsna Verma2013-03-05
* Hexagon: Add support for lowering block address.Jyotsna Verma2013-03-05
* Hexagon: Expand addc, adde, subc and sube.Jyotsna Verma2013-03-05
* Hexagon: Expand cttz, ctlz, and ctpop for now.Anshuman Dasgupta2013-02-21
* Update TargetLowering ivars for name policy.Jim Grosbach2013-02-20
* Move MRI liveouts to Hexagon return instructions.Jakob Stoklund Olesen2013-02-05
* Teach SDISel to combine fsin / fcos into a fsincos node if the followingEvan Cheng2013-01-29
* Improve r172468: const_cast is not needed hereDmitri Gribenko2013-01-14
* Fix Another CastDavid Greene2013-01-14
* Move all of the header files which are involved in modelling the LLVM IRChandler Carruth2013-01-02
* Use the new script to sort the includes of every file under lib.Chandler Carruth2012-12-03
* Finish the renaming.Rafael Espindola2012-11-21
* TargetLowering interface to set/get minimum block entries for jump tables.Sebastian Pop2012-09-25
* Remove tabs.Bill Wendling2012-07-19
* Fix typos found by http://github.com/lyda/misspell-checkBenjamin Kramer2012-06-02
* Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCallJustin Holewinski2012-05-25
* Hexagon V5 FP Support.Sirish Pande2012-05-10
* Revert r155365, r155366, and r155367. All three of these have regressionChandler Carruth2012-04-23
* Hexagon V5 (floating point) support.Sirish Pande2012-04-23
* llvm/lib/Target: [PR12611] Add "llvm/Support/raw_ostream.h" for Debug build o...NAKAMURA Takumi2012-04-21
* HexagonISelLowering.cpp: Reorder #includes.NAKAMURA Takumi2012-04-21
* Convert more uses of XXXRegisterClass to &XXXRegClass. No functional change s...Craig Topper2012-04-20
* This reverts a long string of commits to the Hexagon backend. TheseChandler Carruth2012-04-18
* Remove unused variableDavid Blaikie2012-04-16
* Hexagon V5 (Floating Point) Support.Sirish Pande2012-04-16
* Reorder includes in Target backends to following coding standards. Remove som...Craig Topper2012-03-17
* Convert more static tables of registers used by calling convention to uint16_...Craig Topper2012-03-11