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path: root/lib/Target/Mips/MipsInstrInfo.cpp
Commit message (Expand)AuthorAge
* Use branches instead of jumps + variable cleanup. Testcase coming next. Patch...Bruno Cardoso Lopes2011-12-06
* Add code needed for copying between 64-bit integer and floating pointerAkira Hatanaka2011-11-07
* Add support for conditional branch instructions with 64-bit register operands.Akira Hatanaka2011-10-11
* Make changes necessary for supporting floating point load and store instructionsAkira Hatanaka2011-10-11
* Simplify and update functions storeRegToStackSlot and loadRegFromStackSlot.Akira Hatanaka2011-10-11
* Simplify definition of FP move instructions.Akira Hatanaka2011-10-08
* Clean up MipsInstrInfo::copyPhysReg and handle copies from and to 64-bit integerAkira Hatanaka2011-10-03
* Revert r140731, "Define classes for unary and binary FP instructions and use ...Jakob Stoklund Olesen2011-09-28
* Define classes for unary and binary FP instructions and use them to defineAkira Hatanaka2011-09-28
* Move TargetRegistry and TargetSelect from Target to Support where they belong.Evan Cheng2011-08-24
* Fix handling of double precision loads and stores when Mips1 is targeted. Akira Hatanaka2011-08-16
* Next round of MC refactoring. This patch factor MC table instantiations, MCEvan Cheng2011-07-14
* - Eliminate MCCodeEmitter's dependency on TargetMachine. It now uses MCInstrInfoEvan Cheng2011-07-11
* Lower MachineInstr to MC Inst and print to .s files. Akira Hatanaka2011-07-07
* Reverse order of operands of address operand mem so that the base operand comesAkira Hatanaka2011-07-07
* Hide the call to InitMCInstrInfo into tblgen generated ctor.Evan Cheng2011-07-01
* Improve Mips back-end's handling of DBG_VALUE. Akira Hatanaka2011-07-01
* Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.Evan Cheng2011-06-28
* Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.incEvan Cheng2011-06-28
* - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo andEvan Cheng2011-06-28
* Reverse unnecessary changes made in r129606 and r129608. There is no change i...Akira Hatanaka2011-04-15
* Fix lines that have incorrect indentation or exceed 80 columns. There is no c...Akira Hatanaka2011-04-15
* Add code for analyzing FP branches. Clean up branch Analysis functions.Akira Hatanaka2011-04-01
* Added support for FP conditional move instructions and fixed bugs in handling...Akira Hatanaka2011-03-31
* Remove (hopefully) all trailing whitespaces from the mips backend. Patch by H...Bruno Cardoso Lopes2011-03-04
* Remove the isMoveInstr() hook.Jakob Stoklund Olesen2010-07-16
* RISC architectures get their memory operand folding for free.Jakob Stoklund Olesen2010-07-11
* Replace copyRegToReg with copyPhysReg for Mips.Jakob Stoklund Olesen2010-07-11
* Use COPY in targetsJakob Stoklund Olesen2010-07-10
* Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). ThisStuart Hastings2010-06-17
* Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that itDan Gohman2010-05-06
* Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.Evan Cheng2010-05-06
* No-ops emitted for scheduling don't correspond with anything in theDan Gohman2010-05-05
* use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()Chris Lattner2010-04-02
* Teach AnalyzeBranch, RemoveBranch and the branchDale Johannesen2010-04-02
* load f64 +0.0 in a cleaner way. This fix part of PR5445Bruno Cardoso Lopes2010-01-19
* Remove the target hook TargetInstrInfo::BlockHasNoFallThrough in favor ofDan Gohman2009-12-05
* Add proper emission of load/store double to stack slots for mips1 targets!Bruno Cardoso Lopes2009-11-25
* Support fp64 immediate zero, this fixes only part of PR5445 Bruno Cardoso Lopes2009-11-13
* Remove unused member functions.Eli Friedman2009-07-24
* llvm_unreachable->llvm_unreachable(0), LLVM_UNREACHABLE->llvm_unreachable.Torok Edwin2009-07-14
* assert(0) -> LLVM_UNREACHABLE.Torok Edwin2009-07-11
* Silence a warning when assertions are turned off.Duncan Sands2009-07-03
* Handle IMPLICIT_DEF with isUndef operand marker, part 2. This patch moves the...Evan Cheng2009-07-01
* Convert Alpha and Mips to use a MachineFunctionInfo subclass toDan Gohman2009-06-03
* Added support for fround, fextend and FP_TO_SINTBruno Cardoso Lopes2009-05-27
* Change MachineInstrBuilder::addReg() to take a flag instead of a list ofBill Wendling2009-05-13
* fix some warnings in release-asserts mode.Chris Lattner2009-03-26
* Removed AFGR32 register classBruno Cardoso Lopes2009-03-21
* Factor out the code to add a MachineOperand to a MachineInstrBuilder.Dan Gohman2009-02-18
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