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path: root/lib/Target/PowerPC/PPCISelLowering.cpp
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* Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2Chris Lattner2007-04-09
| | | | | | | are always unsupported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35835 91177308-0d34-0410-b5e6-96231b3b80d8
* Starting implementation of the ELF32 ABI specification of varargs handling.Nicolas Geoffray2007-04-03
| | | | | | | | LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics (VAARG, VACOPY and VAEND) are not yet implemented. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35625 91177308-0d34-0410-b5e6-96231b3b80d8
* The PPC64 ELF ABI is "intended to use the same structure layout and calling ↵Nicolas Geoffray2007-04-03
| | | | | | | | | | convention rules as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/). Change all ELF tests to ELF32. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35624 91177308-0d34-0410-b5e6-96231b3b80d8
* The ELF ABI specifies F1-F8 registers as argument registers for double, notNicolas Geoffray2007-04-03
| | | | | | | F1-F10. This affects only ELF, not MachO. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35622 91177308-0d34-0410-b5e6-96231b3b80d8
* implement the new addressing mode description hook.Chris Lattner2007-03-30
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35521 91177308-0d34-0410-b5e6-96231b3b80d8
* "The C standards do say that "char" may either be a "signed char" or "unsignedLauro Ramos Venancio2007-03-27
| | | | | | | | | char" and it is up to the compilers implementation or the platform which is followed." http://www.arm.linux.org.uk/docs/faqs/signedchar.php git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35382 91177308-0d34-0410-b5e6-96231b3b80d8
* switch TargetLowering::getConstraintType to take the entire constraint,Chris Lattner2007-03-25
| | | | | | | not just the first letter. No functionality change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35322 91177308-0d34-0410-b5e6-96231b3b80d8
* Stack and register alignment of call arguments in the ELF ABINicolas Geoffray2007-03-13
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
* More flexible TargetLowering LSR hooks for testing whether an immediate is a ↵Evan Cheng2007-03-12
| | | | | | legal target address immediate or scale. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
* Switch PPC return lower to use an autogenerated CC description.Chris Lattner2007-03-06
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34940 91177308-0d34-0410-b5e6-96231b3b80d8
* Implemented the frameaddress intrinsic for PPC.Nicolas Geoffray2007-03-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34787 91177308-0d34-0410-b5e6-96231b3b80d8
* Differentiate between the MachO and the ELF ABI the CALL instruction.Nicolas Geoffray2007-02-27
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34667 91177308-0d34-0410-b5e6-96231b3b80d8
* always lower to RETFLAG, never leave it as just ret.Chris Lattner2007-02-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34639 91177308-0d34-0410-b5e6-96231b3b80d8
* no really, this is the right patchChris Lattner2007-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34605 91177308-0d34-0410-b5e6-96231b3b80d8
* always promote float varargs to double.Chris Lattner2007-02-25
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34604 91177308-0d34-0410-b5e6-96231b3b80d8
* implement support for the linux/ppc function call ABI. Patch byChris Lattner2007-02-25
| | | | | | | Nicolas Geoffray! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34574 91177308-0d34-0410-b5e6-96231b3b80d8
* Simplify lowering and selection of exception ops.Jim Laskey2007-02-22
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34488 91177308-0d34-0410-b5e6-96231b3b80d8
* Support to provide exception and selector registers.Jim Laskey2007-02-21
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34482 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix ixaddrs as well, allowing ppc64 to compile to:Chris Lattner2007-02-17
| | | | | | | | | | | | | | | | | | | | | | _test2: li r2, 0 lis r3, 1 std r2, 9024(r3) blr instead of: _test2: lis r2, 1 li r3, 0 ori r2, r2, 9024 std r3, 0(r2) blr This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34373 91177308-0d34-0410-b5e6-96231b3b80d8
* Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to:Chris Lattner2007-02-17
| | | | | | | | | | | | | | | | | | | | _test: lis r2, 743 li r3, 0 stw r3, 32751(r2) blr instead of: _test: li r2, 0 stw r2, 32751(48693248) blr Implement support for ppc64 as well, allowing it to produce better code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@34371 91177308-0d34-0410-b5e6-96231b3b80d8
* Finish off bug 680, allowing targets to custom lower frame and returnNate Begeman2007-01-29
| | | | | | | address nodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33636 91177308-0d34-0410-b5e6-96231b3b80d8
* Propagate changes from my local tree. This patch includes:Anton Korobeynikov2007-01-28
| | | | | | | | | | | | | | | | | | | | | | | | 1. New parameter attribute called 'inreg'. It has meaning "place this parameter in registers, if possible". This is some generalization of gcc's regparm(n) attribute. It's currently used only in X86-32 backend. 2. Completely rewritten CC handling/lowering code inside X86 backend. Merged stdcall + c CCs and fastcall + fast CC. 3. Dropped CSRET CC. We cannot add struct return variant for each target-specific CC (e.g. stdcall + csretcc and so on). 4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in on first attribute has meaning 'This is hidden pointer to structure return. Handle it gently'. 5. Fixed small bug in llvm-extract + add new feature to FunctionExtraction pass, which relinks all internal-linkaged callees from deleted function to external linkage. This will allow further linking everything together. NOTEs: 1. Documentation will be updated soon. 2. llvm-upgrade should be improved to translate csret => sret. Before this, there will be some unexpected test fails. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33597 91177308-0d34-0410-b5e6-96231b3b80d8
* Make LABEL a builtin opcode.Jim Laskey2007-01-26
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@33537 91177308-0d34-0410-b5e6-96231b3b80d8
* setSetCCIsExpensive is gone.Evan Cheng2007-01-05
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32941 91177308-0d34-0410-b5e6-96231b3b80d8
* Provide support for FP_TO_UINT.Jim Laskey2006-12-15
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32599 91177308-0d34-0410-b5e6-96231b3b80d8
* Another step forward in PPC64 JIT support: we now no-longer need stubsChris Lattner2006-12-11
| | | | | | | | | | | emitted for external globals in PPC64-JIT-PIC mode (which is good because we didn't handle them before!). This also fixes a bug handling the picbase delta, which we would get wrong in some cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32451 91177308-0d34-0410-b5e6-96231b3b80d8
* Missing opcode.Jim Laskey2006-12-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32439 91177308-0d34-0410-b5e6-96231b3b80d8
* Cleaned setjmp/longjmp lowering interfaces. Now we're producing rightAnton Korobeynikov2006-12-10
| | | | | | | | code (both asm & cbe) for Mingw32 target. Removed autoconf checks for underscored versions of setjmp/longjmp. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32415 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix i64 uint_to_fp on ppc64Chris Lattner2006-12-07
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32297 91177308-0d34-0410-b5e6-96231b3b80d8
* Restoration of the stack pointer after a deallocation of a alloca was notJim Laskey2006-12-04
| | | | | | | updating the SP link. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32202 91177308-0d34-0410-b5e6-96231b3b80d8
* 1. In ppc64 mode we need only use one GPR.Jim Laskey2006-12-01
| | | | | | | 2. Float values need to be promoted to double when they are vararg. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32074 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix the CodeGen/PowerPC/vec_constants.ll regression.Chris Lattner2006-12-01
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32057 91177308-0d34-0410-b5e6-96231b3b80d8
* Fix bug codegen'ing FP constant vectors with integer splats. Make sure theChris Lattner2006-11-29
| | | | | | | | created intrinsics have the right integer types. This fixes PowerPC/2006-11-29-AltivecFPSplat.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32024 91177308-0d34-0410-b5e6-96231b3b80d8
* Offset for load of 32-bit arg in 64-bit world was incorrect.Jim Laskey2006-11-29
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@32019 91177308-0d34-0410-b5e6-96231b3b80d8
* Remove debug code.Jim Laskey2006-11-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31970 91177308-0d34-0410-b5e6-96231b3b80d8
* 32-bit int space was not accounted for properly in lowerCall.Jim Laskey2006-11-28
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31966 91177308-0d34-0410-b5e6-96231b3b80d8
* Change MachineInstr ctor's to take a TargetInstrDescriptor reference insteadEvan Cheng2006-11-27
| | | | | | | of opcode and number of operands. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31947 91177308-0d34-0410-b5e6-96231b3b80d8
* on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots.Chris Lattner2006-11-18
| | | | | | | Also, valist should create a pointer RC reg class value, not a GPRC value. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31840 91177308-0d34-0410-b5e6-96231b3b80d8
* convert PPC::BCC to use the 'pred' operand instead of separate predicateChris Lattner2006-11-17
| | | | | | | | | value and CR reg #. This requires swapping the order of these everywhere that touches BCC and requires us to write custom matching logic for PPCcondbranch :( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31835 91177308-0d34-0410-b5e6-96231b3b80d8
* rename PPC::COND_BRANCH to PPC::BCCChris Lattner2006-11-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31834 91177308-0d34-0410-b5e6-96231b3b80d8
* start using PPC predicates more consistently.Chris Lattner2006-11-17
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31833 91177308-0d34-0410-b5e6-96231b3b80d8
* This is a general clean up of the PowerPC ABI. Address several problems andJim Laskey2006-11-16
| | | | | | | | | | bugs including making sure that the TOS links back to the previous frame, that the maximum call frame size is not included twice when using frame pointers, no longer growing the frame on calls, double storing of SP and a cleaner/faster dynamic alloca. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31792 91177308-0d34-0410-b5e6-96231b3b80d8
* fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memriChris Lattner2006-11-15
| | | | | | | addrmodes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31757 91177308-0d34-0410-b5e6-96231b3b80d8
* lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead ofChris Lattner2006-11-14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | '(shr (ctlz (sub Y, Z)), 5)'. The use of xor better exposes the operation to bit-twiddling logic in the dag combiner. For example, this: typedef struct { unsigned prefix : 4; unsigned code : 4; unsigned unsigned_p : 4; } tree_common; int foo(tree_common *a, tree_common *b) { return a->code == b->code; } Now compiles to: _foo: lwz r2, 0(r4) lwz r3, 0(r3) xor r2, r3, r2 rlwinm r2, r2, 28, 28, 31 cntlzw r2, r2 srwi r3, r2, 5 blr instead of: _foo: lbz r2, 3(r4) lbz r3, 3(r3) srwi r2, r2, 4 srwi r3, r3, 4 subf r2, r2, r3 cntlzw r2, r2 srwi r3, r2, 5 blr saving a cycle. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31725 91177308-0d34-0410-b5e6-96231b3b80d8
* minor tweaks, reject vector preinc.Chris Lattner2006-11-14
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31717 91177308-0d34-0410-b5e6-96231b3b80d8
* ppc64 doesn't have lwau, don't attempt to form it.Chris Lattner2006-11-11
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31656 91177308-0d34-0410-b5e6-96231b3b80d8
* implement preinc support for r+i loads on ppc64Chris Lattner2006-11-10
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31654 91177308-0d34-0410-b5e6-96231b3b80d8
* add an initial cut at preinc loads for ppc32. This is broken for ppc64Chris Lattner2006-11-10
| | | | | | | | | | (because the 64-bit reg target versions aren't implemented yet), doesn't support r+r addr modes, and doesn't handle stores, but it works otherwise. :) This is disabled unless -enable-ppc-preinc is passed to llc for now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31621 91177308-0d34-0410-b5e6-96231b3b80d8
* PPC supports i32 / i64 pre-inc load / store.Evan Cheng2006-11-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31599 91177308-0d34-0410-b5e6-96231b3b80d8
* Rename ISD::MemOpAddrMode to ISD::MemIndexedModeEvan Cheng2006-11-09
| | | | git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@31595 91177308-0d34-0410-b5e6-96231b3b80d8
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