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R600
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AMDGPUInstructions.td
Commit message (
Expand
)
Author
Age
*
R600: Fix inconsistency in rsq instructions.
Matt Arsenault
2014-06-24
*
R600/SI: Add intrinsics for various math instructions.
Matt Arsenault
2014-06-19
*
R600: Remove AMDIL instruction and register definitions
Tom Stellard
2014-06-13
*
R600: Mostly remove remaining AMDIL intrinsics.
Matt Arsenault
2014-06-12
*
R600/SI: Add common 64-bit LDS atomics
Matt Arsenault
2014-06-11
*
R600/SI: Add 32-bit LDS atomic cmpxchg
Matt Arsenault
2014-06-11
*
R600/SI: Refactor local atomics.
Matt Arsenault
2014-06-11
*
R600: Handle fcopysign
Matt Arsenault
2014-06-10
*
R600/SI: Fix [s|u]int_to_fp for i1
Matt Arsenault
2014-05-31
*
R600: Expand mul24 for GPUs without it
Matt Arsenault
2014-05-22
*
R600: Expand mad24 for GPUs without it
Matt Arsenault
2014-05-22
*
R600: Add intrinsics for mad24
Matt Arsenault
2014-05-22
*
R600/SI: Print more immediates in hex format
Matt Arsenault
2014-04-15
*
R600: Match 24-bit arithmetic patterns in a Target DAGCombine
Tom Stellard
2014-04-07
*
R600: Reorganize tablegen instruction definitions
Tom Stellard
2014-03-24
*
R600: Remove unnecessary build_vector pattern.
Matt Arsenault
2014-02-26
*
R600: Disable the BFE pattern
Tom Stellard
2014-01-23
*
R600/SI: Fixing handling of condition codes
Tom Stellard
2013-11-22
*
R600/SI: Add support for private address space load/store
Tom Stellard
2013-11-13
*
Target/R600: Un-tab-ify.
NAKAMURA Takumi
2013-10-28
*
R600: Fix handling of NAN in comparison instructions
Tom Stellard
2013-09-28
*
R600: Add support for LDS atomic subtract
Aaron Watry
2013-09-06
*
R600: Add support for local memory atomic add
Tom Stellard
2013-09-05
*
R600: Add support for i8 and i16 local memory loads
Tom Stellard
2013-08-26
*
R600: Add support for i8 and i16 local memory stores
Tom Stellard
2013-08-26
*
R600: Add support for i16 and i8 global stores
Tom Stellard
2013-08-16
*
R600/SI: Lower BUILD_VECTOR to REG_SEQUENCE v2
Tom Stellard
2013-08-14
*
R600: Add support for 24-bit MUL instructions
Tom Stellard
2013-07-23
*
R600: Improve support for < 32-bit loads
Tom Stellard
2013-07-23
*
R600: Clean up extended load patterns
Tom Stellard
2013-07-23
*
R600/SI: Add support for 64-bit loads
Tom Stellard
2013-07-15
*
R600: Add local memory support via LDS
Tom Stellard
2013-06-28
*
R600/SI: Add support for global loads
Tom Stellard
2013-06-03
*
R600: Swap the legality of rotl and rotr
Tom Stellard
2013-05-20
*
R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen ...
Tom Stellard
2013-05-10
*
R600: Add pattern for SHA-256 Ma function
Tom Stellard
2013-05-03
*
R600: Use new tablegen syntax for patterns
Tom Stellard
2013-05-02
*
R600: Add pattern for the BFI_INT instruction
Tom Stellard
2013-04-19
*
R600/SI: Add pattern for AMDGPUurecip
Michel Danzer
2013-04-10
*
R600/SI: add float vector types
Christian Konig
2013-03-18
*
R600/SI: remove shader type intrinsic
Christian Konig
2013-03-07
*
R600/SI: simplify VOPC_* pattern v2
Christian Konig
2013-02-21
*
R600/SI: Add basic support for more integer vector types.
Tom Stellard
2013-02-07
*
R600: Consolidate sub register indices.
Tom Stellard
2013-02-07
*
R600: Support for indirect addressing v4
Tom Stellard
2013-02-06
*
Add R600 backend
Tom Stellard
2012-12-11
