| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | R600/SI: Add processor type for Hainan asic | Tom Stellard | 2013-05-14 |
| * | R600: Clean up comments in Processors.td | Tom Stellard | 2013-05-03 |
| * | R600: Rework Scheduling to handle difference between VLIW4 and VLIW5 chips | Vincent Lejeune | 2013-04-30 |
| * | R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions | Vincent Lejeune | 2013-04-30 |
| * | R600: Add some new processor variants | Vincent Lejeune | 2013-04-30 |
| * | R600: Add RV670 processor | Tom Stellard | 2013-04-05 |
| * | R600/SI: Add processor types for each SI variant | Tom Stellard | 2013-04-05 |
| * | R600: Add an explicit default processor | Tom Stellard | 2013-02-07 |
| * | Add R600 backend | Tom Stellard | 2012-12-11 |
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