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R600
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R600Instructions.td
Commit message (
Expand
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Author
Age
*
R600: Fix inconsistency in rsq instructions.
Matt Arsenault
2014-06-24
*
R600/SI: Add a pattern for f32 ftrunc
Tom Stellard
2014-06-20
*
R600/SI: Add intrinsics for various math instructions.
Matt Arsenault
2014-06-19
*
R600: Use LDS and vectors for private memory
Tom Stellard
2014-06-17
*
R600: Remove AMDIL instruction and register definitions
Tom Stellard
2014-06-13
*
R600: Set correct InstrItinClass for instructions using *Helper classes
Tom Stellard
2014-06-11
*
R600: Expand mul24 for GPUs without it
Matt Arsenault
2014-05-22
*
R600: Expand mad24 for GPUs without it
Matt Arsenault
2014-05-22
*
R600: Reorganize tablegen instruction definitions
Tom Stellard
2014-03-24
*
R600: Match sign_extend_inreg to BFE instructions
Matt Arsenault
2014-03-17
*
R600: LDS instructions shouldn't implicitly define OQAP
Tom Stellard
2014-03-13
*
R600: Remove unnecessary build_vector pattern.
Matt Arsenault
2014-02-26
*
Fix known typos
Alp Toker
2014-01-24
*
R600: Disable the BFE pattern
Tom Stellard
2014-01-23
*
R600: Add some missing CF instruction definitions to the .td files.
Tom Stellard
2014-01-22
*
R600: CF_PUSH is the same on Evergreen and Cayman
Tom Stellard
2014-01-22
*
R600: MOVA is vector only
Tom Stellard
2014-01-22
*
R600: Allow ftrunc
Tom Stellard
2013-12-20
*
R600: Workaround for cayman loop bug
Vincent Lejeune
2013-12-02
*
R600: Add support for ISD::FROUND
Tom Stellard
2013-11-27
*
R600/SI: Fixing handling of condition codes
Tom Stellard
2013-11-22
*
R600/SI: Add support for private address space load/store
Tom Stellard
2013-11-13
*
R600: Use function inputs to represent data stored in gpr
Vincent Lejeune
2013-11-11
*
R600: Clear the VPM bit of export instructions.
Vincent Lejeune
2013-10-13
*
R600: Add a ldptr intrinsic to support MSAA.
Vincent Lejeune
2013-10-02
*
R600: add a pass that merges clauses.
Vincent Lejeune
2013-10-01
*
R600: Enable -verify-machineinstrs in some tests.
Vincent Lejeune
2013-10-01
*
R600: Fix handling of NAN in comparison instructions
Tom Stellard
2013-09-28
*
SelectionDAG: Try to expand all condition codes using getCCSwappedOperands()
Tom Stellard
2013-09-28
*
R600: Add support for LDS atomic subtract
Aaron Watry
2013-09-06
*
R600: Add support for local memory atomic add
Tom Stellard
2013-09-05
*
R600: Use SchedModel enum for is{Trans,Vector}Only functions
Vincent Lejeune
2013-09-04
*
R600: Add support for i8 and i16 local memory loads
Tom Stellard
2013-08-26
*
R600: Add support for i8 and i16 local memory stores
Tom Stellard
2013-08-26
*
R600: Add support for i16 and i8 global stores
Tom Stellard
2013-08-16
*
R600: Add support for v4i32 stores on Cayman
Tom Stellard
2013-08-16
*
R600: Add IsExport bit to TableGen instruction definitions
Tom Stellard
2013-08-16
*
R600: Change the RAT instruction assembly names so they match the docs
Tom Stellard
2013-08-16
*
R600/SI: Handle MSAA texture targets
Tom Stellard
2013-08-14
*
R600: Add 64-bit float load/store support
Tom Stellard
2013-08-01
*
Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"
Tom Stellard
2013-07-31
*
R600: Use SchedModel enum for is{Trans,Vector}Only functions
Vincent Lejeune
2013-07-31
*
R600: Remove predicated_break inst
Vincent Lejeune
2013-07-31
*
R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS loads when necessary
Tom Stellard
2013-07-23
*
R600: Add support for 24-bit MAD instructions
Tom Stellard
2013-07-23
*
R600: Add support for 24-bit MUL instructions
Tom Stellard
2013-07-23
*
R600: Improve support for < 32-bit loads
Tom Stellard
2013-07-23
*
R600: Use KCache for kernel arguments
Tom Stellard
2013-07-23
*
R600: Clean up extended load patterns
Tom Stellard
2013-07-23
*
R600: Don't emit empty then clause and use alu_pop_after
Vincent Lejeune
2013-07-19
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