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path: root/lib/Target/R600/R600Instructions.td
Commit message (Expand)AuthorAge
* R600: Fix inconsistency in rsq instructions.Matt Arsenault2014-06-24
* R600/SI: Add a pattern for f32 ftruncTom Stellard2014-06-20
* R600/SI: Add intrinsics for various math instructions.Matt Arsenault2014-06-19
* R600: Use LDS and vectors for private memoryTom Stellard2014-06-17
* R600: Remove AMDIL instruction and register definitionsTom Stellard2014-06-13
* R600: Set correct InstrItinClass for instructions using *Helper classesTom Stellard2014-06-11
* R600: Expand mul24 for GPUs without itMatt Arsenault2014-05-22
* R600: Expand mad24 for GPUs without itMatt Arsenault2014-05-22
* R600: Reorganize tablegen instruction definitionsTom Stellard2014-03-24
* R600: Match sign_extend_inreg to BFE instructionsMatt Arsenault2014-03-17
* R600: LDS instructions shouldn't implicitly define OQAPTom Stellard2014-03-13
* R600: Remove unnecessary build_vector pattern.Matt Arsenault2014-02-26
* Fix known typosAlp Toker2014-01-24
* R600: Disable the BFE patternTom Stellard2014-01-23
* R600: Add some missing CF instruction definitions to the .td files.Tom Stellard2014-01-22
* R600: CF_PUSH is the same on Evergreen and CaymanTom Stellard2014-01-22
* R600: MOVA is vector onlyTom Stellard2014-01-22
* R600: Allow ftruncTom Stellard2013-12-20
* R600: Workaround for cayman loop bugVincent Lejeune2013-12-02
* R600: Add support for ISD::FROUNDTom Stellard2013-11-27
* R600/SI: Fixing handling of condition codesTom Stellard2013-11-22
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-13
* R600: Use function inputs to represent data stored in gprVincent Lejeune2013-11-11
* R600: Clear the VPM bit of export instructions.Vincent Lejeune2013-10-13
* R600: Add a ldptr intrinsic to support MSAA.Vincent Lejeune2013-10-02
* R600: add a pass that merges clauses.Vincent Lejeune2013-10-01
* R600: Enable -verify-machineinstrs in some tests.Vincent Lejeune2013-10-01
* R600: Fix handling of NAN in comparison instructionsTom Stellard2013-09-28
* SelectionDAG: Try to expand all condition codes using getCCSwappedOperands()Tom Stellard2013-09-28
* R600: Add support for LDS atomic subtractAaron Watry2013-09-06
* R600: Add support for local memory atomic addTom Stellard2013-09-05
* R600: Use SchedModel enum for is{Trans,Vector}Only functionsVincent Lejeune2013-09-04
* R600: Add support for i8 and i16 local memory loadsTom Stellard2013-08-26
* R600: Add support for i8 and i16 local memory storesTom Stellard2013-08-26
* R600: Add support for i16 and i8 global storesTom Stellard2013-08-16
* R600: Add support for v4i32 stores on CaymanTom Stellard2013-08-16
* R600: Add IsExport bit to TableGen instruction definitionsTom Stellard2013-08-16
* R600: Change the RAT instruction assembly names so they match the docsTom Stellard2013-08-16
* R600/SI: Handle MSAA texture targetsTom Stellard2013-08-14
* R600: Add 64-bit float load/store supportTom Stellard2013-08-01
* Revert "R600: Use SchedModel enum for is{Trans,Vector}Only functions"Tom Stellard2013-07-31
* R600: Use SchedModel enum for is{Trans,Vector}Only functionsVincent Lejeune2013-07-31
* R600: Remove predicated_break instVincent Lejeune2013-07-31
* R600: Treat CONSTANT_ADDRESS loads like GLOBAL_ADDRESS loads when necessaryTom Stellard2013-07-23
* R600: Add support for 24-bit MAD instructionsTom Stellard2013-07-23
* R600: Add support for 24-bit MUL instructionsTom Stellard2013-07-23
* R600: Improve support for < 32-bit loadsTom Stellard2013-07-23
* R600: Use KCache for kernel argumentsTom Stellard2013-07-23
* R600: Clean up extended load patternsTom Stellard2013-07-23
* R600: Don't emit empty then clause and use alu_pop_afterVincent Lejeune2013-07-19