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path: root/lib/Target/R600/SIInstrInfo.cpp
Commit message (Expand)AuthorAge
* R600/SI: Match not instruction.Matt Arsenault2014-04-09
* R600/SI: Handle INSERT_SUBREG in SIFixSGPRCopiesTom Stellard2014-04-07
* R600/SI: Implement shouldConvertConstantLoadToIntImmMatt Arsenault2014-03-31
* R600/SI: Implement SIInstrInfo::isTriviallyRematerializable()Tom Stellard2014-03-31
* R600/SI: Fix extra mov from legalizing 64-bit SALU ops.Matt Arsenault2014-03-24
* R600/SI: Sub-optimial fix for 64-bit immediates with SALU ops.Matt Arsenault2014-03-24
* R600/SI: Fix 64-bit bit ops that require the VALU.Matt Arsenault2014-03-24
* R600/SI: Move splitting 64-bit immediates to separate function.Matt Arsenault2014-03-24
* R600/SI: Fix warning with gcc 4.8.2Tom Stellard2014-03-24
* R600/SI: Move instruction patterns to scalar versions.Matt Arsenault2014-03-21
* R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU()Tom Stellard2014-03-21
* R600/SI: Handle S_MOV_B64 in SIInstrInfo::moveToVALU()Tom Stellard2014-03-21
* R600/SI: Fix implementation of isInlineConstant() used by the verifierTom Stellard2014-03-17
* R600/SI: Add generic checks to SIInstrInfo::verifyInstruction()Tom Stellard2014-03-17
* Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changingOwen Anderson2014-03-13
* Move trivial getter into header.Matt Arsenault2014-03-11
* R600/SI: Initialize M0 and emit S_WQM_B64 whenever DS instructions are usedTom Stellard2014-02-10
* Allow MachineCSE to coalesce trivial subregister copies the same way that it ...Andrew Trick2013-12-17
* R600/SI: Implement spilling of SGPRs v5Tom Stellard2013-11-27
* R600/SI: Fix moveToVALU when the first operand is VSrc.Matt Arsenault2013-11-18
* R600/SI: Fix multiple SGPR reads when using VCC.Matt Arsenault2013-11-18
* R600/SI: Move patterns to match add / sub to scalar instructionsMatt Arsenault2013-11-18
* R600/SI: Fix extra defs of VCC / SCC.Matt Arsenault2013-11-18
* Make method staticMatt Arsenault2013-11-15
* Indentation fixesMatt Arsenault2013-11-14
* Add a commentMatt Arsenault2013-11-14
* R600: Fix uninitialized variable usageTom Stellard2013-11-13
* R600/SI: Add support for private address space load/storeTom Stellard2013-11-13
* R600/SI: Prefer SALU instructions for bit shift operationsTom Stellard2013-11-13
* Target/R600: Un-tab-ify.NAKAMURA Takumi2013-10-28
* R600/SI: Use llvm_unreachable() for an always false assertTom Stellard2013-10-22
* R600/SI: Fix warning on non-asserts buildTom Stellard2013-10-22
* R600: Simplify handling of private address spaceTom Stellard2013-10-22
* R600: Remove unused InstrInfo::getMovImmInstr() functionTom Stellard2013-10-22
* R600/SI: Remove some leftover MI dump callVincent Lejeune2013-10-15
* R600/SI: Implement SIInstrInfo::verifyInstruction() for VOP*Tom Stellard2013-10-10
* Remove unused stdio.h includesDmitri Gribenko2013-08-18
* R600/SI: Fix broken encoding of DS_WRITE_B32Michel Danzer2013-08-16
* R600/SI: Assign a register class to the $vaddr operand for MIMG instructionsTom Stellard2013-08-14
* Make some arrays 'static const'Craig Topper2013-07-15
* Don't cache the instruction and register info from the TargetMachine, becauseBill Wendling2013-06-07
* R600/SI: dynamical figure out the reg class of MIMGChristian Konig2013-04-10
* R600/SI: add cummuting of rev instructionsChristian Konig2013-03-27
* R600/SI: improve vector interpolationChristian Konig2013-03-26
* R600/SI: handle all registers in copyPhysReg v2Christian Konig2013-03-01
* R600/SI: add some more instruction flagsChristian Konig2013-02-26
* R600/SI: cleanup literal handling v3Christian Konig2013-02-16
* R600/SI: Handle VGPR64 destination in copyPhysReg().Tom Stellard2013-02-07
* R600: Support for indirect addressing v4Tom Stellard2013-02-06
* Resort the #include lines in include/... and lib/... with theChandler Carruth2013-01-02
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