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path: root/lib/Target/R600
Commit message (Expand)AuthorAge
* Fix typosAlp Toker2014-06-19
* Convert some assert(0) to llvm_unreachable or fold an 'if' condition into the...Craig Topper2014-06-19
* R600/SI: Add intrinsics for various math instructions.Matt Arsenault2014-06-19
* Use stdint macros for specifying size of constantsMatt Arsenault2014-06-18
* R600: Handle fnearbyintMatt Arsenault2014-06-18
* R600/SI: add gather4 and getlod intrinsics (v3)Marek Olsak2014-06-18
* Use LL suffix for literal that should be 64-bits.Matt Arsenault2014-06-18
* R600: Expand vector fceilJan Vesely2014-06-18
* Work around ridiculous warning.Matt Arsenault2014-06-18
* R600/SI: Add intrinsics for brev instructionsMatt Arsenault2014-06-18
* R600/SI: Prettier operand printing for 64-bit ops.Matt Arsenault2014-06-18
* R600: Implement f64 ftrunc, ffloor and fceil.Matt Arsenault2014-06-18
* R600: Custom lower f64 frint for pre-CIMatt Arsenault2014-06-18
* R600/SI: Temporary fix for f64 fnegMatt Arsenault2014-06-18
* R600/SI: Comparisons set vcc.Matt Arsenault2014-06-18
* R600: Implement 64bit SRAJan Vesely2014-06-18
* R600: Implement 64bit SRLJan Vesely2014-06-18
* R600: Implement 64bit SHLJan Vesely2014-06-18
* R600/SI: Make sure target flags are set on pseudo VOP3 instructionsTom Stellard2014-06-17
* R600/SI: Match cttz_zero_undefMatt Arsenault2014-06-17
* R600/SI: Match ctlz_zero_undefMatt Arsenault2014-06-17
* R600: Use LDS and vectors for private memoryTom Stellard2014-06-17
* R600/SI: Add a pattern for llvm.AMDGPU.barrier.globalTom Stellard2014-06-17
* SelectionDAG: Expand i64 = FP_TO_SINT i32Tom Stellard2014-06-17
* R600/SI: Re-initialize the m0 register after using it for indirect addressingTom Stellard2014-06-17
* Fix copy paste errorMatt Arsenault2014-06-15
* R600: Remove a few more things from AMDILISelLoweringMatt Arsenault2014-06-15
* R600: Fix assert on vector sdivMatt Arsenault2014-06-15
* R600: Move / cleanup more leftover AMDIL stuff.Matt Arsenault2014-06-15
* R600: Move division custom lowering out of AMDILISelLoweringMatt Arsenault2014-06-15
* R600: Report that integer division is expensive.Matt Arsenault2014-06-15
* R600: Remove dead codeMatt Arsenault2014-06-15
* Fix typoMatt Arsenault2014-06-14
* R600: Fix asserts related to constant initializersMatt Arsenault2014-06-14
* R600: Use address space enum instead of valueMatt Arsenault2014-06-14
* R600: Cleanup some old AMDIL stuff.Matt Arsenault2014-06-13
* R600: Remove AMDIL instruction and register definitionsTom Stellard2014-06-13
* R600: Don't call setOperationAction with things that aren't opcodes.Matt Arsenault2014-06-13
* R600/SI: Fix selection error on i64 rotl / rotr.Matt Arsenault2014-06-13
* R600: Move AMDGPUInstrInfo from AMDGPUTargetMachine into AMDGPUSubtargetTom Stellard2014-06-13
* R600: Drop use of cached TargetMachine in R600InstrInfo.cppTom Stellard2014-06-13
* R600: Drop use of cached TargetMachine in AMDGPUInstrInfo.cppTom Stellard2014-06-13
* R600: Mostly remove remaining AMDIL intrinsics.Matt Arsenault2014-06-12
* R600/SI: Use a register set to -1 for data0 on ds_inc*/ds_dec*Matt Arsenault2014-06-12
* R600: Set correct InstrItinClass for instructions using *Helper classesTom Stellard2014-06-11
* R600: BCNT_INT is a vector only instructionTom Stellard2014-06-11
* R600/SI: Fix bitcast between v2i32 and f64Matt Arsenault2014-06-11
* R600/SI: Update place using old subtarget predicateMatt Arsenault2014-06-11
* R600/SI: Add common 64-bit LDS atomicsMatt Arsenault2014-06-11
* R600/SI: Add instruction definitions for 64-bit LDS atomicsMatt Arsenault2014-06-11
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