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X86
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X86InstrCompiler.td
Commit message (
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Author
Age
*
[X86] Add peephole for masked rotate amount
Adam Nemet
2014-03-12
*
[X86] Refactor peepholes for masked shift amount into a multiclass
Adam Nemet
2014-03-12
*
X86: Enable ISel of 16-bit MOVBE instructions.
Jim Grosbach
2014-03-11
*
Merge x86 HasOpSizePrefix/HasOpSize16Prefix into a 2-bit OpSize field with 0 ...
Craig Topper
2014-02-02
*
[x86] Remove OpSize16 flag from MOV32r0
David Woodhouse
2014-01-08
*
[x86] Add OpSize16 to instructions that need it
David Woodhouse
2014-01-08
*
Remove opcode from MOV32r0 that I accidentally left when I converted it to Ps...
Craig Topper
2014-01-05
*
Handle MOV32r0 in expandPostRAPseudo instead of MCInst lowering. No functiona...
Craig Topper
2013-12-31
*
[x86] Rename In32BitMode predicate to Not64BitMode
Eric Christopher
2013-12-20
*
Revert "Revert "Mark vastart_save_xmm_regs as changing EFLAGS""
Duncan P. N. Exon Smith
2013-12-17
*
Revert "Mark vastart_save_xmm_regs as changing EFLAGS"
Duncan P. N. Exon Smith
2013-12-17
*
Mark vastart_save_xmm_regs as changing EFLAGS
Duncan P. N. Exon Smith
2013-12-17
*
AVX-512: Implemented CMOV for 512-bit vectors
Elena Demikhovsky
2013-10-31
*
Revert part of a fix from 2010, changes since then:
Eric Christopher
2013-10-14
*
Remove some extraneous whitespace.
Eric Christopher
2013-10-14
*
Mark that the _ftol2 function used by windows on x86 to handle fptoui modifie...
Craig Topper
2013-07-21
*
X86: change MOV64ri64i32 into MOV32ri64
Tim Northover
2013-06-01
*
Temporarily Revert "X86: change MOV64ri64i32 into MOV32ri64" as it
Eric Christopher
2013-05-31
*
X86: change MOV64ri64i32 into MOV32ri64
Tim Northover
2013-05-31
*
X86: use sub-register sequences for MOV*r0 operations
Tim Northover
2013-05-30
*
X86: change zext moves to use sub-register infrastructure.
Tim Northover
2013-05-30
*
Annotate X86InstrCompiler.td with SchedRW lists.
Jakob Stoklund Olesen
2013-03-25
*
Annotate X86InstrCompiler.td with SchedRW lists.
Jakob Stoklund Olesen
2013-03-19
*
Remove an invalid and unnecessary Pat pattern from the X86 backend:
Ulrich Weigand
2013-03-19
*
X86: Disable cmov-memory patterns on subtargets without cmov.
Benjamin Kramer
2013-02-23
*
Fix an issue of pseudo atomic instruction DAG schedule
Michael Liao
2013-01-22
*
Remove # from the beginning and end of def names.
Craig Topper
2013-01-07
*
Add hasSideEffects=0 to some atomic instructions.
Craig Topper
2012-12-26
*
Add __builtin_setjmp/_longjmp supprt in X86 backend
Michael Liao
2012-10-15
*
X86: fcmov doesn't handle all possible EFLAGS, fall back to a branch for the ...
Benjamin Kramer
2012-10-07
*
Remove some encoding bits I forgot to remove from SETB_C16r and SETB_C64r in ...
Craig Topper
2012-10-05
*
Move expansion of SETB_C(8/16/32/64)r from MCInstLower to ExpandPostRAPseudos...
Craig Topper
2012-10-05
*
Add 'lock' prefix output support in assembly printer
Michael Liao
2012-09-26
*
Fix 16-bit atomic inst encoding and keep pseudo-inst starting with '#'
Michael Liao
2012-09-22
*
Fix typo in r164357
Michael Liao
2012-09-22
*
Fix a typo in r164357
Michael Liao
2012-09-21
*
Revise td of X86 atomic instructions
Michael Liao
2012-09-21
*
Re-work X86 code generation of atomic ops with spin-loop
Michael Liao
2012-09-20
*
Fix the TCRETURNmi64 bug differently.
Jakob Stoklund Olesen
2012-09-13
*
Revert r163761 "Don't fold indexed loads into TCRETURNmi64."
Jakob Stoklund Olesen
2012-09-13
*
Don't fold indexed loads into TCRETURNmi64.
Jakob Stoklund Olesen
2012-09-13
*
Implement the local-dynamic TLS model for x86 (PR3985)
Hans Wennborg
2012-06-01
*
Use ptr_rc_tailcall instead of GR32_TC.
Jakob Stoklund Olesen
2012-05-09
*
X86: optimization for -(x != 0)
Manman Ren
2012-05-07
*
Always compute all the bits in ComputeMaskedBits.
Rafael Espindola
2012-04-04
*
Make x86 REP_MOV* and REP_STO instructions use the correct operand sizes in 6...
Lang Hames
2012-03-29
*
This patch adds X86 instruction itineraries for non-pseudo opcodes in
Preston Gurd
2012-03-19
*
Add WIN_FTOL_* psudo-instructions to model the unique calling convention
Michael J. Spencer
2012-02-24
*
Use the same CALL instructions for Windows as for everything else.
Jakob Stoklund Olesen
2012-02-16
*
Make sure the non-SSE lowering for fences correctly clobbers EFLAGS. PR11768.
Eli Friedman
2012-01-16
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